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US3593036A Expired / Lapsed US ⏱️ 0.0 years remaining

Mosfet momentary switch circuit

Assignee: Raytheon Co
•
Filing: 1969-12-15
•
Granted: 1971-07-13
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Expires: 1989-12-15
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Abstract

Abstract A metal oxide semiconductor field effect transistor (MOSFET) circuit of a type that can be constructed on a single semiconductor substrate which accepts a signal from a manually operated momentary switch and provides a DC output signal at one of two possible voltage levels. The circuit includes a trigger flip-flop which provides the DC output signal. The circuit also includes a NOR gate, an RS flip-flop and an inverter interconnected in a manner to prevent the spurious signals caused by switch contact bounce or line noise from giving an incorrect indication at the output of the circuit.

Inventors

  • 👤 Stephen P F Ma
  • 👤 Richard E Sklar

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 22:39
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/01; H03K3/013; H03K3/02; H03K3/027; H03K3/037; H03K3/353; H03K3/356; H03K3/356017

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 42 words
A circuit as claimed in claim 1 which further includes: a trigger flip-flop coupled to receive the digital output signal of said gate and operable to change states when the digital output signal of said gate is in the second (T) state.
Claim 2
Dependent Claim 21 words
A circuit as claimed in claim 1 wherein said first digital input sigNal is provided by a manually operated momentary switch.
Claim 3
Dependent Claim 189 words
A circuit as claimed in claim 1 wherein said circuit means includes: an inverter having an input coupled to receive the first digital input signal and providing an inverted output signal; a flip-flop having a set input, a reset input, a clock pulse input coupled to receive a fourth digital input signal which is the complement of the second digital input signal, and a reset output for providing the third digital input signal, said flip-flop being operable to change states according to signals applied to its set input and its reset input when the fourth digital input signal is in its second (T) state; a first gating MOSFET having a first signal terminal coupled to receive the inverted output signal of said inverter, a second signal terminal coupled to the reset input of said flip-flop, and a gate terminal coupled to receive the second digital input signal; and a second gating MOSFET having a first signal terminal coupled to receive the first digital input signal, a second signal terminal coupled to the set input of said flip-flop, and a gate terminal coupled to receive the second digital input signal.
Claim 4
Dependent Claim 188 words
A MOSFET trigger flip-flop circuit operable to receive an input signal and to provide first and second output signals, said MOSFET trigger flip-flop circuit comprising: a flip-flop having a first input, a second input, a first output for providing the first output signal, a second output for providing the second output signal, and a clock pulse input coupled to receive the input signal; said flip-flop operable to change states according to the signals applied to its first and second inputs when a signal is applied to its clock pulse input; a first gating MOSFET having a first signal terminal coupled to receive the first output signal, a second signal terminal coupled to the first input of said flip-flop, and a gate terminal; a second gating MOSFET having a first signal terminal coupled to receive the second output signal, a second signal terminal coupled to the second input of said flip-flop, and a gate terminal; and MOSFET inverting means coupled to receive the input signal for providing an inverted output signal, the inverted output signal being applied to the gate terminals of said first and said second gating MOSFET''s.

References Cited (Backward Citations)

US3324306A Cited
US3381143A Cited
US3430071A Cited
US3471789A Cited
US3518451A Cited
US3508079A Cited
US3476879A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-07-12 1975-01-11 1975-07-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-07-12 1979-01-11 1979-07-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-07-12 1983-01-11 1983-07-13 $7700.00 Window Closed / Lapsed

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