A method and apparatus for performing a bus arbitration protocol in a data processing system

Claim 2

The method of claim 1 further comprising the steps of: detecting, via said arbiter (14), re-assertion of said bus request signal by said first bus master device; and granting said first bus master device ownership of said first shared bus upon completion by said first slave device of a second bus transaction.

Claim 3

In a data processing system (10) having a predetermined number of bus masters (12, 16, 17) each of which is coupled to a predetermined number of shared buses (20, 22, 24, 26), a method for implementing a snoop-retry bus arbitration protocol using an arbiter (14), coupled to each of said predetermined number of bus masters (12, 16, 17), to control allocation of bus ownership, said method comprising the steps of: asserting, via a snooping processor, a first control signal in response to detecting a snoop hit during a first bus transaction, said first control signal notifying a first bus master that a data entry for an address requested during said first bus transaction is resident in said snooping processor, and to relinquish ownership of a first shared bus and retry said bus transaction; detecting, via said first bus master and each of a predetermined number of potential bus masters, assertion of said first control signal, each of said predetermined number of potential bus masters and said first bus master removing a bus request signal from said arbiter, and ignoring assertion by said arbiter of a bus grant signal, in response to detecting assertion by said snooping processor of said first control signal; and suppressing assertion, by each of said predetermined number of potential bus masters, of said bus request signal.

Claim 4

The method of claim 3 further comprising the steps of: detecting, via said arbiter (14), re-assertion of said bus request signal by said first bus master; and granting said first bus master ownership of said first shared bus upon completion by said snooping processor of a second bus transaction.

Claim 5

The method of claim 3 wherein said step of detecting, via said first bus master and each of a predetermined number of potential bus masters, assertion of said first control signal comprises the step of monitoring a shared a shared signal line of a second shared bus to determine when one of said predetermined number of bus masters has requested that a current bus master terminate a particular transaction and re-try said particular transaction at a later time.

Claim 6

The method of claim 3 wherein said step of suppressing assertion, by each of said predetermined number of potential bus masters, of said bus request signal occurs until said snooping processor detects said first shared bus is available and negates said first control signal.

Claim 7

A data processing system (10) for performing a snoop-retry bus arbitration protocol to control allocation of bus ownership for each of a predetermined number of shared buses (20, 22, 24, 26), said data processing system (10) comprising: first means (14) for detecting assertion of each of a plurality of independent bus request signals and for selectively asserting in response thereto each of a plurality of independent bus grant signals; second means (12) coupled to said first means (14) and each of said predetermined number of shared buses (20, 22, 24, 26), said second means (12) being a first bus master of a first shared bus; third means (16) coupled to said first means (14) and each of said predetermined number of shared buses (20, 22, 24, 26), said third means (16) snooping a first bus transaction performed by said first bus master and asserting a first control signal, in response to detecting a snoop hit, to notify said first bus master to relinquish ownership of said first shared bus and to retry said bus transaction, said second means (12) removing a first bus request signal from said arbiter (14) and ignoring assertion of a first bus grant signal by said arbiter, in response to receiving said first control signal from said third means (16); and fourth means (17) coupled to said first means (14) and each of a predetermined number of shared buses (20, 22, 24, 26), said fourth means (17) receiving said first control signal from said third means (16) and removing a second bus request signal from said first means (14), in response thereto, and said fourth means (17) ignoring assertion by said arbiter of a second bus grant signal.

Claim 8

The data processing system (10) of claim 7 further comprising a memory system (18) coupled to said second means (12), said third means (16), and said fourth means (17), via said predetermined number of shared buses (20, 22, 24, 26).

Claim 9

The data processing system (10) of claim 7 wherein said first means (14) comprises an arbiter for supporting a snoop copyback update of said memory system (18) by said third means (16), said arbiter asserting a third bus grant signal to grant ownership of said shared bus to said third means (16), in response to said third means (16) detecting said snoop hit and requesting bus mastership from said arbiter.

Claim 10

The data processing system (10) of claim 7 wherein said second means (12) and said fourth means (17) suppress assertion of said first bus request signal and said second bus request signals, respectively, until said third means (16) negates said first control signal to enable said arbiter to grant bus mastership to said third means (16).