Patent US6943112B2 successfully refreshed from Google Patents.
US6943112B2
Expired / Lapsed
US
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Defect-free thin and planar film processing
Assignee: Novellus Systems Inc
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Filing: 2003-03-03
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Granted: 2005-09-13
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Expires: 2023-03-03
Abstract
Abstract The process of the present invention forms copper interconnects in a semiconductor wafer surface. During the process, initially, narrow and large features are provided in the top surface of the wafer, and then a primary copper layer is deposited by employing an electrochemical deposition process. The primary copper layer completely fills the features and forms a planar surface over the narrow feature and a non-planar surface over the large feature. By employing an electrochemical mechanical deposition process, a secondary copper layer is deposited onto the primary copper layer to form a planar copper layer over the narrow and large features. After this process step, the thickness of the planar copper layer is reduced using an electropolishing process.
Inventors
- 👤 Bulent M. Basol
- 👤 Cyprian Uzoh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 11:10
CPC Classifications
C; C25; C25D; C25D17/00; C25D17/001; H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10P; H10P14/00; H10P14/40; H10P14/46; H10P14/47; H10P52/00; H10P52/20; H10P52/203; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/062; C25D7/00; C25D7/12; C25D7/123
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
79 words
A process for forming conductive structures on a semiconductor wafer having a top surface with a first feature and a second feature disposed therein, the first feature having a first width and a second feature having the widest width, the process comprising the steps: electrochemically depositing a first conductive layer to completely fill the first feature and the second feature; and electrochemically mechanically depositing a second conductive layer over the first conductive layer to form a planar conductive layer.
Claim 2
Dependent Claim
79 words
A process for forming conductive structures on a semiconductor wafer having a top surface with a first feature and a second feature disposed therein, the first feature having a first width and a second feature having the widest width, the process comprising the steps: electrochemically depositing a first conductive layer to completely fill the first feature and the second feature; and electrochemically mechanically depositing a second conductive layer over the first conductive layer to form a planar conductive layer.
Claim 3
Dependent Claim
39 words
The process of claim 1 , wherein the step of electrochemically depositing includes a first electrolyte solution having a first additive composition and the step of electrochemically mechanically depositing includes a second electrolyte solution having a second additive composition.
Claim 4
Dependent Claim
17 words
The process of claim 1 further comprising the step of chemical mechanical polishing the planar conductive layer.
Claim 5
Dependent Claim
15 words
The process of claim 1 further comprising the step of electropolishing the planar conductive layer.
Claim 6
Dependent Claim
19 words
The process of claim 4 , wherein the step of electropolishing removes substantially all of the planar conductive layer.
Claim 7
Dependent Claim
17 words
The process of claim 4 further comprising the step of chemical mechanical polishing the planar conductive layer.
Claim 8
Dependent Claim
25 words
The process of claim 6 , wherein the chemical mechanical polishing step removes the second conductive layer from the top surface of the semiconductor wafer.
Claim 9
Dependent Claim
25 words
The process of claim 7 , wherein the chemical mechanical polishing step removes the first conductive layer from the top surface of the semiconductor wafer.
Claim 10
Dependent Claim
21 words
The process of claim 8 , wherein the chemical mechanical polishing step electrically isolates the first feature from the second feature.
Claim 11
Dependent Claim
41 words
The process of claim 1 , wherein the step of electrochemically depositing a first conductive layer deposits the first conductive layer in the second feature to a thickness that is greater than or equal to a depth of the second feature.
Claim 12
Dependent Claim
41 words
The process of claim 2 , wherein the step of electrochemically depositing a first conductive layer deposits the first conductive layer in the second feature to a thickness that is greater than or equal to a depth of the second feature.
Claim 13
Dependent Claim
15 words
The process of claim 1 further comprising the step of annealing the first conductive layer.
Claim 14
Dependent Claim
15 words
The process of claim 1 further comprising the step of annealing the second conductive layer.
Claim 15
Dependent Claim
18 words
The process of claim 1 , wherein the first conductive layer and the second conductive layer are copper.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2008-09-12 | 2009-03-14 | 2009-09-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-09-12 | 2013-03-14 | 2013-09-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2016-09-12 | 2017-03-14 | 2017-09-13 | $7700.00 | Window Closed / Lapsed |