Patent US6835598B2 successfully refreshed from Google Patents.
US6835598B2
Expired / Lapsed
US
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Stacked semiconductor module and method of manufacturing the same
Assignee: Samsung Electronics Co Ltd
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Filing: 2003-03-03
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Granted: 2004-12-28
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Expires: 2023-03-03
Abstract
Abstract A stacked semiconductor module includes a lower chip scale package (CSP) mounted on a module board, and an inverted upper CSP attached to the top of lower CSP to form a stacked semiconductor package. The lower and upper CSPs are electrically connected to each other outside of the stacked semiconductor package. This electrical connection may be made using the module board. Further, a conductive interconnection tape may be used to electrically connect the upper CSP to regions on the module board, which are electrically connected to the region at which the lower CSP is electrically connected to the module board.
Inventors
- 👤 Joong-hyun Baek
- 👤 Jin-yang Lee
- 👤 Yun-Hyeok Im
- 👤 Tae-koo Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:06
CPC Classifications
H; H10; H10W; H10W90/00; H10W70/00; H10W70/60; H10W70/611; H10W72/00; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W90/20; H10W90/26; H10W90/288; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
37 words
A stacked semiconductor module, comprising: a module board; and at least one stacked semiconductor package, each stacked semiconductor package including two or more chip scale packages (CSPs) electrically connected to each other outside the stacked semiconductor package.
Claim 2
Dependent Claim
37 words
A stacked semiconductor module, comprising: a module board; and at least one stacked semiconductor package, each stacked semiconductor package including two or more chip scale packages (CSPs) electrically connected to each other outside the stacked semiconductor package.
Claim 3
Dependent Claim
20 words
The stacked semiconductor module of claim 1 , wherein the at least two CSPs include a double die package (DDP).
Claim 4
Dependent Claim
43 words
The stacked semiconductor module of claim 1 , wherein the at least two CSPs include at least one of a fine pitch ball grid array (FBGA) package, a tape ball grid array (TBGA) package, and a wire bonding ball grid array (WBGA) package.
Claim 5
Dependent Claim
28 words
The stacked semiconductor module of claim 1 , wherein the at least two CSPs includes a CSP, which is a stacked structure of two or more semiconductor chips.
Claim 6
Dependent Claim
21 words
The stacked semiconductor module of claim 1 , wherein the two or more CSPs are electrically connected via the module board.
Claim 7
Dependent Claim
54 words
The stacked semiconductor module of claim 5 , wherein the two or more CSPs include a lower CSP and a higher CSP, the lower CSP being electrically connected to the module board, and the stacked semiconductor module further includes, at least one conductive interconnection tape electrically connecting the upper CSP to the module board.
Claim 8
Dependent Claim
18 words
The stacked semiconductor module of claim 6 , wherein the conductive interconnection tape comprises an etched lead frame.
Claim 9
Dependent Claim
30 words
The stacked semiconductor module of claim 6 , wherein the conductive interconnection tape includes a copper pattern formed on a flexible base film, the flexible base film including a polyimide.
Claim 10
Dependent Claim
77 words
The stacked semiconductor module of claim 6 , wherein the module board is a printed circuit board (PCB) including, a mounting region at which the lower CSP is electrically connected; at least one tape adhesion region at which the at least one conductive interconnection tape is electrically connected; a copper pattern electrically connecting the mounting region and the at least one tape adhesion region; and a module pin connection region at which the copper pattern outwardly extends.
Claim 11
Dependent Claim
25 words
The stacked semiconductor module of claim 9 , wherein the module board includes no more than four tape adhesion regions corresponding to the mounting region.
Claim 12
Dependent Claim
66 words
The stacked semiconductor module of claim 6 , wherein the lower CSP and the upper CSP each include, a substrate having a first and second side; at least one semiconductor chip formed over the first side of the substrate, the at least one semiconductor chip being electrically connected to the substrate, and one or more external connection terminals attached to the second side of the substrate.
Claim 13
Dependent Claim
64 words
The stacked semiconductor module of claim 11 , wherein the upper CSP is inverted and attached to the lower CSP via at least one chip adhesion region, the external connection terminals of the lower CSP being electrically connected to a lower CSP mounting region of the module board, the external connection terminals of the upper CSP being electrically connected to the conductive interconnection tape.
Claim 14
Dependent Claim
33 words
The stacked semiconductor module of claim 12 , wherein the at least one chip adhesion region comprises at least one of an adhesive tape, a solder, and a liquid adhesive hardened by heat.
Claim 15
Dependent Claim
90 words
The stacked semiconductor module of claim 12 , wherein the conductive interconnection tape includes a copper pattern formed on a flexible base film, the copper pattern including, an upper CSP mounting region to which the external connection terminals of the upper CSP are electrically connected; one or more tape bonding regions at each end of the copper pattern, each tape bonding region being electrically connected to a tape adhesion region of the module board; and a connection pattern electrically connecting the upper CSP mounting region to the tape bonding regions.
Claim 16
Dependent Claim
70 words
The stacked semiconductor module according to claim 14 , wherein the module board includes a substrate, the tape bonding region being electrically connected to the lower CSP mounting region by a conductive pattern formed over the substrate; and the tape bound region includes at least one of a photo solder resist (PSR) and an anisotropic conductive adhesive formed over at least a portion of the conductive pattern and the substrate.
Claim 17
Dependent Claim
78 words
The stacked semiconductor module according to claim 15 , wherein the external connection terminals of the lower CSP are of a first type and the external connection terminals of the upper CSP are of a second type, the first and second type each being one of solder bump and solder ball, and the lower CSP mounting region and the upper CSP mounting region are configured to receive the external connection terminals of the first and second type, respectively.
Claim 18
Dependent Claim
23 words
The stacked semiconductor module of claim 6 , further comprising a heat spread plate formed over the at least one stacked semiconductor package.
Claim 19
Dependent Claim
32 words
The stacked semiconductor module of claim 17 , wherein the heat spread plate includes a metal layer formed over a thermal interface material (TIM) on the at least one conductive interconnection tape.
Claim 20
Dependent Claim
20 words
The stacked semiconductor module of claim 18 , wherein the metal layer comprises at least one of nickel, iron, aluminum.
Claim 21
Dependent Claim
28 words
The stacked semiconductor module of claim 6 , further comprising a heat sink formed over the at least one conductive interconnection tape, the heat sink being outwardly exposed.
Claim 22
Dependent Claim
54 words
The stacked semiconductor module of claim 20 , the at least one semiconductor package including a plurality of semiconductor packages, wherein the heat sink is formed over the conductive interconnection tapes electrically connecting the upper CSPs of the plurality of semiconductor packages to the module board, the heat sink connecting the conductive interconnection tapes.
Claim 23
Independent Claim
62 words
A method of manufacturing a stacked semiconductor module comprising: a) preparing a module board to include one or more mounting regions; b) mounting a stacked semiconductor package on each mounting region, the stacked semiconductor package including a lower chip scale package (CSP) and an upper CSP; and c) electrically connecting the lower CSP to the upper CSP outside the stacked semiconductor package.
Claim 24
Independent Claim
62 words
A method of manufacturing a stacked semiconductor module comprising: a) preparing a module board to include one or more mounting regions; b) mounting a stacked semiconductor package on each mounting region, the stacked semiconductor package including a lower chip scale package (CSP) and an upper CSP; and c) electrically connecting the lower CSP to the upper CSP outside the stacked semiconductor package.
Claim 25
Dependent Claim
23 words
The method of claim 22 , wherein the step c) electrically connects the lower CSP to the upper CSP via the module board.
Claim 26
Dependent Claim
58 words
The method of claim 23 , the lower CSP being electrically connected to a corresponding one of the mounting regions, wherein the step c) uses a conductive interconnection tape to electrically connect the upper CSP to one or more tape adhesion regions on the module board, the tape adhesion regions being electrically connected to the corresponding mounting region.
Claim 27
Dependent Claim
135 words
The method of claim 24 , each of the lower and upper CSPs including a substrate, the substrate including a first and second side, the first side including a semiconductor chip and the second side including external connection terminals, wherein the step b) includes, b1) electrically connecting the external connection terminals of the lower CSP to the corresponding mounting region; b2) forming at least one chip adhesion region over the lower CSP; b3) inverting the upper CSP and attaching the inverted upper CSP to the at least one chip adhesion region such that the external connection terminals are facing away from the lower CSP, and the step c) bonds the external connection terminals of the upper CSP to the conductive interconnection tape in order to electrically connect the upper CSP to the tape bonding regions.
Claim 28
Dependent Claim
20 words
The method of claim 24 , the method further comprising forming a heat spread plate over the conductive interconnection tape.
Claim 29
Dependent Claim
59 words
The method of claim 24 , the method further comprising: repeating the steps b) and c) to mount and electrically connect a plurality of stacked semiconductor packages to the module board using a plurality of conductive interconnection tapes; forming an outwardly exposed heat sink over the conductive interconnection tapes, the heat sink connecting the plurality of conductive interconnection tapes.
Claim 30
Dependent Claim
14 words
A stacked semiconductor module manufactured in accordance with the method of claim 22 .
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2007-12-28 | 2008-06-28 | 2008-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2011-12-28 | 2012-06-28 | 2012-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2015-12-28 | 2016-06-28 | 2016-12-28 | $7700.00 | Window Closed / Lapsed |