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US6803634B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Stabilization in device characteristics of a bipolar transistor that is included in a semiconductor device with a CMOSFET

Assignee: Denso Corp
•
Filing: 2002-11-07
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Granted: 2004-10-12
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Expires: 2022-11-07
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Abstract

Abstract In the manufacturing process of a Bi-CMOS semiconductor device, which includes a CMOSFET and a bipolar transistor, the steps for forming a well region, source regions, and drain regions of the CMOSFET are also used for forming the bipolar transistor. One of the steps is used for introducing impurities of the same conductivity type in a surface of a base region of the bipolar transistor in order to form a high impurity concentration region in the surface. The high impurity concentration region is formed such that the distance between an emitter region of the bipolar transistor and the high impurity concentration region becomes 1 to 2 mum. The shift in device characteristics of the bipolar transistor is improved by the high impurity concentration region even if the impurity concentration is relatively low at the surface of the base region of the bipolar transistor.

Inventors

  • 👤 Takuya Okuno
  • 👤 Shoji Mizuno
  • 👤 Toshitaka Kanemaru

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 20:20
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/201; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; H10D84/40; H10D84/401

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 121 words
A method for manufacturing a semiconductor device that includes a CMOSFET and a bipolar transistor, wherein the bipolar transistor is formed on a substrate by forming a well region of the CMOSFET and pairs of regions of the CMOSFET, each pair of which includes a source region and a drain region, on the substrate, and wherein a high impurity concentration region is formed by introducing a first impurity of the same conductivity type as a base region of the bipolar transistor in a surface of the base region wherein an insulating film is formed on a surface of the base region, and wherein a hydrogen barrier film is formed on the insulating film to cover the surface of the base region.
Claim 2
Independent Claim 121 words
A method for manufacturing a semiconductor device that includes a CMOSFET and a bipolar transistor, wherein the bipolar transistor is formed on a substrate by forming a well region of the CMOSFET and pairs of regions of the CMOSFET, each pair of which includes a source region and a drain region, on the substrate, and wherein a high impurity concentration region is formed by introducing a first impurity of the same conductivity type as a base region of the bipolar transistor in a surface of the base region wherein an insulating film is formed on a surface of the base region, and wherein a hydrogen barrier film is formed on the insulating film to cover the surface of the base region.
Claim 3
Dependent Claim 33 words
The method in claim 1 , wherein the hydrogen barrier film includes one film selected from the group that consists of a polycrystalline silicon film, an aluminum film, and a silicon nitride film.
Claim 4
Dependent Claim 15 words
The method in claim 1 , wherein an SOI substrate is used for the substrate.
Claim 5
Independent Claim 101 words
A method for manufacturing a semiconductor device, which includes a CMOSFET and a bipolar transistor, wherein the bipolar transistor is formed on a substrate using steps of forming a well region of the CMOSFET and pairs of regions of the CMOSFET, each pair of which includes a source region and a drain region, on the substrate, and wherein a surface of a base region, of the bipolar transistor is exposed to ultraviolet rays to reduce the amount of charges existing at an interface between the base region and an insulating film, which is located on the surface of the base region.
Claim 6
Independent Claim 101 words
A method for manufacturing a semiconductor device, which includes a CMOSFET and a bipolar transistor, wherein the bipolar transistor is formed on a substrate using steps of forming a well region of the CMOSFET and pairs of regions of the CMOSFET, each pair of which includes a source region and a drain region, on the substrate, and wherein a surface of a base region, of the bipolar transistor is exposed to ultraviolet rays to reduce the amount of charges existing at an interface between the base region and an insulating film, which is located on the surface of the base region.
Claim 7
Dependent Claim 39 words
The method in claim 4 , wherein an insulating film is formed on a surface of the base region, and wherein a hydrogen barrier film is formed on the insulating film to cover the surface of the base region.
Claim 8
Dependent Claim 33 words
The method in claim 5 , wherein the hydrogen barrier film includes one film selected from the group that consists of a polycrystalline silicon film, an aluminum film, and a silicon nitride film.
Claim 9
Independent Claim 94 words
A method for manufacturing a semiconductor devices, which includes a CMOSFET and a bipolar transistor, wherein the bipolar transistor is formed on a substrate using steps of fanning a well region of the CMOSFET and pairs of regions of the CMOSFET, each pair of which includes a source region and a drain region, on the substrate, and wherein an insulating film is formed on a surface of a base region of the bipolar transistor, and wherein a hydrogen barrier film is formed on the insulating film to cover the surface of the base region.
Claim 10
Independent Claim 94 words
A method for manufacturing a semiconductor devices, which includes a CMOSFET and a bipolar transistor, wherein the bipolar transistor is formed on a substrate using steps of fanning a well region of the CMOSFET and pairs of regions of the CMOSFET, each pair of which includes a source region and a drain region, on the substrate, and wherein an insulating film is formed on a surface of a base region of the bipolar transistor, and wherein a hydrogen barrier film is formed on the insulating film to cover the surface of the base region.
Claim 11
Dependent Claim 33 words
The method in claim 7 , wherein the hydrogen barrier film includes one film selected from the group that consists of a polycrystalline silicon film, an aluminum film, and a silicon nitride film.
Claim 12
Dependent Claim 37 words
The method in claim 7 , wherein the hydrogen barrier film is formed from a polycrystalline silicon film that is used for forming a gate electrode of the CMOSFET at a step of forming the gate electrode.
Claim 13
Dependent Claim 15 words
The method in claim 7 , wherein an SOI substrate is used for the substrate.
Claim 14
Dependent Claim 84 words
A semiconductor device comprising a CMOSFET and a bipolar transistor, wherein the CMOSFET and the bipolar transistor are located on the same substrate, wherein a high impurity concentration region, which includes a impurity of the same conductivity type as a base region of the bipolar transistor with higher concentration than the base region, is located in a surface of the base region, wherein the distance between an emitter region of the bipolar transistor and the high impurity concentration region is 2 μm or shorter.
Claim 15
Dependent Claim 84 words
A semiconductor device comprising a CMOSFET and a bipolar transistor, wherein the CMOSFET and the bipolar transistor are located on the same substrate, wherein a high impurity concentration region, which includes a impurity of the same conductivity type as a base region of the bipolar transistor with higher concentration than the base region, is located in a surface of the base region, wherein the distance between an emitter region of the bipolar transistor and the high impurity concentration region is 2 μm or shorter.
Claim 16
Dependent Claim 15 words
The semiconductor device in claim 11 , wherein the distance is 1 μm or longer.
Claim 17
Dependent Claim 42 words
A semiconductor device comprising a CMOSFET and a bipolar transistor, wherein the CMOSFET and the bipolar transistor are located on the same substrate, wherein a hydrogen barrier film is located on a surface of the base region with an insulating film in-between.
Claim 18
Dependent Claim 42 words
A semiconductor device comprising a CMOSFET and a bipolar transistor, wherein the CMOSFET and the bipolar transistor are located on the same substrate, wherein a hydrogen barrier film is located on a surface of the base region with an insulating film in-between.
Claim 19
Dependent Claim 33 words
The method in claim 13 , wherein the hydrogen barrier film includes one film selected from the group that consists of a polycrystalline silicon film, an aluminum film, and a silicon nitride film.
Claim 20
Dependent Claim 46 words
The semiconductor device in claim 13 , wherein the hydrogen barrier film is made of a polycrystalline silicon film, wherein a gate electrode of the CMOSFET is made of another polycrystalline silicon film, and wherein the polycrystalline silicon films are formed from a polycrystalline silicon film.
Claim 21
Dependent Claim 14 words
The semiconductor device in claim 13 , wherein the substrate is an SOI substrate.

References Cited (Backward Citations)

JPS60144962A Cited
US5059549A Cited
JPH02100339A Cited
US5340756A Cited
US6156595A Cited
EP0948046A1 Cited
US6352887B1 Cited
US6365932B1 Cited
US6492211B1 Cited

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