EP0948046A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Merged bipolar and CMOS circuit and method
Assignee: Texas Instruments Inc
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Filing: 1999-03-25
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Granted: —
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Expires: 2019-03-25
Abstract
Abstract A method for fabricating a BiCMOS integrated circuit. The method includes the steps of forming in a single implantation step a base region 211 of a bipolar transistor and a p-well 212 of an n-channel MOS transistor; and forming in a single implantation step a collector contact well 213 of a bipolar transistor and an n-well 208 of a p-channel MOS transistor.
Inventors
- 👤 Louis N. Hutter
- 👤 Peter Ying
- 👤 Marco Corsi
- 👤 Imran Khan
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 02:22
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; H10D84/40; H10D84/401
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
56 words
A method for fabricating a BiCMOS integrated circuit, comprising the steps of: forming in a single implantation step a base region of a bipolar transistor and
a p-well of an n-channel MOS transistor; and forming in a single implantation step a collector contact well of a bipolar
transistor and an n-well of a p-channel MOS transistor.
Claim 2
Independent Claim
173 words
A method for fabricating a BiCMOS integrated circuit, comprising the steps of: forming an n-type collector region within a semiconductor substrate of lighter
doping; forming a plurality of p-type wells, at least one of said plurality of p-type wells
forming a base region lying between said collector region and a surface of said
semiconductor substrate, said base region adjoining said collector region and
extending to said surface, and at least one of said plurality of p-type wells forming an
n-channel MOS well; forming a plurality of n-type wells, at least one of said plurality of n-type wells
forming a collector contact well lying between said collector region and said surface of
said semiconductor substrate, said collector contact well adjoining said collector
region and extending to said surface, further said collector contact well lying between
said base region and said n-channel MOS well, and at least one of said plurality of n-type
wells forming a p-channel MOS well; and forming an emitter region adjoining said base region, said emitter region
extending to said surface.
Claim 3
Dependent Claim
27 words
The method of Claim 2, further including the step of implanting p-dopants into
said p-type wells, excluding a portion of said base region adjacent said emitter region.
Claim 4
Dependent Claim
25 words
The method of Claim 2, further including the step of implanting n-type dopants
into said n-type wells and into a portion of said base region.
Claim 5
Dependent Claim
25 words
The method of Claim 4, further including the step of implanting n-type dopants
into said n-type wells and into a portion of said base region.
Claim 6
Dependent Claim
96 words
A bipolar transistor, comprising: a collector region of a first doping profile within a semiconductor substrate of
lighter doping; a base region between said collector region and a surface of said semiconductor
substrate, said base region adjoining said collector region and extending to said
surface; an emitter region adjoining said base region, said emitter region extending to
said surface; and a well region adjoining said collector region and said base region and extending
to said surface, said well region having a doping profile characterized by doping
concentrations lighter than doping concentrations of said first doping profile.
Claim 7
Dependent Claim
18 words
The transistor of Claim 6, wherein said base region is characterized by a
substantially uniform lateral doping profile.
Claim 8
Dependent Claim
23 words
The transistor of Claim 6, wherein said base region is characterized by a lighter
doping concentration in a region adjacent said emitter region.
Claim 9
Dependent Claim
45 words
A BiCMOS integrated circuit, comprising: (a) a bipolar transistor including a collector well contact region; and (b) a MOS transistor having source and drain contacts formed in an n-well
region, said collector well contact region and said n-well region having substantially
the same dopant profile.
Claim 10
Dependent Claim
159 words
A BiCMOS integrated circuit, comprising: (a) a bipolar transistor including: a collector region within a semiconductor substrate, said collector region
having a first dopant profile; a base region between said collector region and a surface of said
semiconductor substrate, said base region adjoining said collector region and
extending to said surface, further said base region having a second doping profile; an emitter region adjoining said base region, said emitter region
extending to said surface; and a collector contact well region adjoining said collector region and said
base region and extending to said surface, said collector contact well region having a
third doping profile, said third doping profile characterized by lighter doping
concentrations than said first doping profile; (b) an n-channel MOS transistor having source and drain contacts formed in a
doped well region having said second doping profile; and (c) a p-channel MOS transistor having source and drain contacts formed in a
well region having said third doping profile.
Claim 11
Dependent Claim
21 words
The integrated circuit of Claim 10, wherein said base region comprises a region of
lighter dopant concentration adjacent said emitter region.
References Cited (Backward Citations)
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