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US6764949B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication

Assignee: GlobalFoundries US Inc
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Filing: 2002-12-30
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Granted: 2004-07-20
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Expires: 2022-12-30
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Abstract

Abstract A hardmask stack is comprised of alternating layers of doped amorphous carbon and undoped amorphous carbon. The undoped amorphous carbon layers serve as buffer layers that constrain the effects of compressive stress within the doped amorphous carbon layers to prevent delamination. The stack is provided with a top capping layer. The layer beneath the capping layer is preferably undoped amorphous carbon to reduce photoresist poisoning. An alternative hardmask stack is comprised of alternating layers of capping material and amorphous carbon. The amorphous carbon layers may be doped or undoped. The capping material layers serve as buffer layers that constrain the effects of compressive stress within the amorphous carbon layers to prevent delamination. The top layer of the stack is formed of a capping material. The layer beneath the top layer is preferably undoped amorphous carbon to reduce photoresist poisoning. The lowest layer of the hardmask stack is preferably amorphous carbon to facilitate easy removal of the hardmask stack from underlying materials by an ashing process.

Inventors

  • 👤 Douglas J. Bonser
  • 👤 Marina V. Plat
  • 👤 Chih Yuh Yang
  • 👤 Scott A. Bell
  • 👤 Darin Chan
  • 👤 Philip A. Fisher
  • 👤 Christopher F. Lyons
  • 👤 Mark S. Chang
  • 👤 Pei-Yuan Gao
  • 👤 Marilyn I. Wright
  • 👤 Lu You
  • 👤 Srikanteswara Dakshina-Murthy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 05:10
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/40; H10P50/00; H10P50/71; H10P10/00; H10P76/405

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 121 words
A method for fabricating a semiconductor device comprising: providing a substrate comprising an upper layer of material; forming a hardmask stack on the upper layer of material, the hardmask stack comprising an amorphous carbon portion formed in contact with the layer of material, and a capping layer formed on the amorphous carbon portion, the amorphous carbon portion comprising alternating layers of doped amorphous carbon containing dopant for enhancing etch selectivity with respect to said upper layer of material, and undoped amorphous carbon containing essentially none of said dopant; forming a photoresist mask over the hardmask stack; and etching the hardmask stack using the photoresist mask as an initial etch mask to form a hardmask for patterning said upper layer of material.
Claim 2
Independent Claim 121 words
A method for fabricating a semiconductor device comprising: providing a substrate comprising an upper layer of material; forming a hardmask stack on the upper layer of material, the hardmask stack comprising an amorphous carbon portion formed in contact with the layer of material, and a capping layer formed on the amorphous carbon portion, the amorphous carbon portion comprising alternating layers of doped amorphous carbon containing dopant for enhancing etch selectivity with respect to said upper layer of material, and undoped amorphous carbon containing essentially none of said dopant; forming a photoresist mask over the hardmask stack; and etching the hardmask stack using the photoresist mask as an initial etch mask to form a hardmask for patterning said upper layer of material.
Claim 3
Dependent Claim 19 words
The method claimed in claim 1 , further comprising patterning said upper layer of material and removing the hardmask.
Claim 4
Dependent Claim 16 words
The method claimed in claim 2 , wherein the hardmask is removed by an ashing process.
Claim 5
Dependent Claim 64 words
The method claimed in claim 1 , wherein the amorphous carbon portion of the photoresist hardmask stack comprises: a lowermost layer of undoped amorphous carbon formed on said layer of material; an uppermost layer of undoped amorphous carbon formed in contact with said capping layer; and at least one layer of doped amorphous carbon between said uppermost and lowermost layers of undoped amorphous carbon.
Claim 6
Dependent Claim 55 words
The method claimed in claim 4 , wherein the amorphous carbon portion of the photoresist hardmask stack comprises: at least two layers of doped amorphous carbon between said uppermost and lowermost layers of undoped amorphous carbon; and at least one layer of undoped amorphous carbon between said at least two layers of doped amorphous carbon.
Claim 7
Dependent Claim 19 words
The method claimed in claim 1 , wherein said doped and undoped layers of amorphous carbon comprise discrete layers.
Claim 8
Dependent Claim 19 words
The method claimed in claim 1 , wherein said doped and undoped layers of amorphous carbon comprise continuous layers.
Claim 9
Dependent Claim 26 words
The method claimed in claim 1 , wherein forming said photoresist mask comprises: forming a photoresist pattern on said capping layer; and trimming said photoresist pattern.
Claim 10
Dependent Claim 16 words
The method claimed in claim 1 , wherein said doped amorphous carbon is doped with nitrogen.
Claim 11
Dependent Claim 36 words
The method claimed in claim 1 , wherein said substrate comprises a semiconductor substrate, and wherein said upper layer of material is a gate conductive material formed over a gate insulating material formed on said substrate.
Claim 12
Independent Claim 102 words
A method for fabricating a semiconductor device comprising: providing a substrate comprising an upper layer of material; forming a hardmask stack on the upper layer of material, the hardmask stack comprising alternating layers of capping material and amorphous carbon including at least an upper capping material layer and a lower capping material layer, and at least one amorphous carbon layer formed between the upper and lower capping material layers; forming a photoresist mask over the hardmask stack; and etching the hardmask stack using the photoresist mask as an initial etch mask to form a hardmask for patterning said upper layer of material.
Claim 13
Independent Claim 102 words
A method for fabricating a semiconductor device comprising: providing a substrate comprising an upper layer of material; forming a hardmask stack on the upper layer of material, the hardmask stack comprising alternating layers of capping material and amorphous carbon including at least an upper capping material layer and a lower capping material layer, and at least one amorphous carbon layer formed between the upper and lower capping material layers; forming a photoresist mask over the hardmask stack; and etching the hardmask stack using the photoresist mask as an initial etch mask to form a hardmask for patterning said upper layer of material.
Claim 14
Dependent Claim 19 words
The method claimed in claim 11 , further comprising patterning said upper layer of material and removing the hardmask.
Claim 15
Dependent Claim 38 words
The method claimed in claim 11 , wherein the hardmask stack further comprises a lower amorphous carbon layer formed on said upper layer of material, said lower capping material layer being formed on said lower amorphous carbon layer.
Claim 16
Dependent Claim 22 words
The method claimed in claim 13 , further comprising removing the hardmask from said upper layer of material by an ashing process.
Claim 17
Dependent Claim 27 words
The method claimed in claim 13 , wherein said lower amorphous carbon layer contains dopant for enhancing etch selectivity with respect to said upper layer of material.
Claim 18
Dependent Claim 12 words
The method claimed in claim 15 , wherein said dopant is nitrogen.
Claim 19
Dependent Claim 26 words
The method claimed in claim 11 , wherein forming said photoresist mask comprises: forming a photoresist pattern on said hardmask stack; and trimming said photoresist pattern.
Claim 20
Dependent Claim 36 words
The method claimed in claim 11 , wherein said substrate comprises a semiconductor substrate, and wherein said upper layer of material is a gate conductive material formed on a gate insulating material formed on said substrate.

References Cited (Backward Citations)

US5356824A Cited
US6080529A Cited
US6143476A Cited
US6331380B1 Cited
US6458516B1 Cited
US6534403B2 Cited
US6664639B2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2007-07-20 2008-01-19 2008-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2011-07-20 2012-01-19 2012-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2015-07-20 2016-01-19 2016-07-20 $7700.00 Window Closed / Lapsed

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