Process for the production of a thin film transistor having a double gate and an optical mask

Claim 1

Process for the production of a thin film transistor having a lower gate and an upper gate, comprising the steps of: a) depositing a layer of a first conductor on an electrical insulating substrate (31) for producing the source and drain (34) of the transistor, b) producing photosensitive resin patterns (33) on the first conductor layer for fixing the location and dimensions of the transistor source and drain, c) eliminating areas of the first conductor layer which are not covered with resin, d) isotropically depositing on the structure obtained in step c) a layer (37) of a second conductor constituted by an opaque metal and which will form the lower gate of the transistor, e) carrying out a heat treatment on the structure obtained in step d) in order to bring about a contraction of the resin patterns, f) isotropically depositing a first electrical insulating layer (39) on the complete structure obtained in step e), g) dissolving the resin patterns in order to eliminate the second conductor and the first insulating layer deposited on the resin patterns, h) depositing a layer (44) of a semiconductor material on the structure obtained in step g), i) depositing a second electrical insulating layer (45) on the semiconductor layer, j) depositing a layer (46) of a third conductor on the second insulating layer for producing the upper gate of the transistor, k) patterning and etching the stack of layers comprising the third conductor layer, the second electrical insulating layer and the semiconductor material layer in order to define the dimensions of the transistor, and l) passivating the structure obtained in step k) with a third electrical insulating layer (48).