Apparatus for package reduction in stacked chip and board assemblies

Claim 2

A semiconductor device assembly comprising: a carrier substrate having a surface; a first interposer substrate having a first surface and a second surface and at least one opening extending therebetween, said second surface of said first interposer substrate substantially facing said surface of said carrier substrate, and said first interposer substrate and said carrier substrate being electrically connected by a set of conductive elements extending transversely therebetween; a second interposer substrate having a first surface and a second surface and at least one opening extending therebetween, said first surface of said second interposer substrate substantially facing said first surface of said first interposer substrate, said first and second interposer substrates being electrically connected by another set of conductive elements extending transversely therebetween; and at least one first die and at least one second die, each having an active surface, said active surface of said at least one first die attached to said second surface of said first interposer substrate over said at least one opening thereof and electrically connected to said first surface thereof through said at least one opening thereof, said active surface of said at least one second die attached to said second surface of said second substrate over said at least one opening thereof and electrically connected to said first surface thereof through said at least one opening thereof.

Claim 3

The assembly according to claim 1 , wherein said active surface of said at least one first die is electrically connected to said first surface of said first interposer substrate with wire bonds and said active surface of said at least one second die is electrically connected to said first surface of said second interposer substrate with wire bonds.

Claim 4

The assembly according to claim 2 , further including a dielectric material disposed between said first and second interposer substrates and substantially encapsulating said wire bonds and said set of conductive elements.

Claim 5

The assembly according to claim 2 , wherein a transverse distance between said first and second interposer substrates is at least greater than a wire bond loop height.

Claim 6

The assembly according to claim 2 , wherein a transverse distance between said first and second interposer substrates is between one wire bond loop height and two wire bond loop heights.

Claim 7

The assembly according to claim 2 , wherein a transverse distance between said first and second interposer substrates is at least twice that of a wire bond loop height.

Claim 8

The assembly according to claim 1 , further including a dielectric material disposed between said first and second interposer substrates and substantially encapsulating said set of conductive elements.

Claim 9

The assembly of claim 1 , wherein said at least one opening of said first interposer substrate and said at least one opening of said second interposer substrate are at least partially mutually laterally offset.

Claim 10

The assembly of claim 1 , wherein said at least one opening of said first interposer substrate and said at least one opening of said second interposer substrate are fully mutually laterally offset.

Claim 11

The assembly of claim 9 , wherein said at least one first die and said at least one second die are respectively electrically connected to first surfaces of said first and second interposer substrates with wire bonds.

Claim 12

An interposer assembly configured for electrical connection to a carrier substrate, the assembly comprising: a first interposer substrate having a first surface, a second opposing surface and at least one opening therethrough; a second interposer substrate having a first surface, a second opposing surface and at least one opening therethrough, said first surface of said first interposer substrate substantially facing said first surface of said second interposer substrate, said first and second interposer substrates being electrically connected by a plurality of conductive elements extending transversely therebetween; and at least one first die and at least one second die, each having an active surface, said active surface of said at least one first die attached to said second surface of said first interposer substrate over said at least one opening thereof and electrically connected to said first surface thereof through said at least one opening thereof, said active surface of said at least one second die attached to said second surface of said second substrate over said at least one opening thereof and electrically connected to said first surface thereof through said at least one opening thereof; wherein a second surface of one of said first and said second interposer substrates carries another plurality of conductive elements projecting transversely therefrom and arranged for effecting an electrical connection between said second surface of said one of said first and said second interposer substrates to a carrier substrate.

Claim 13

An interposer assembly configured for electrical connection to a carrier substrate, the assembly comprising: a first interposer substrate having a first surface, a second opposing surface and at least one opening therethrough; a second interposer substrate having a first surface, a second opposing surface and at least one opening therethrough, said first surface of said first interposer substrate substantially facing said first surface of said second interposer substrate, said first and second interposer substrates being electrically connected by a plurality of conductive elements extending transversely therebetween; and at least one first die and at least one second die, each having an active surface, said active surface of said at least one first die attached to said second surface of said first interposer substrate over said at least one opening thereof and electrically connected to said first surface thereof through said at least one opening thereof, said active surface of said at least one second die attached to said second surface of said second substrate over said at least one opening thereof and electrically connected to said first surface thereof through said at least one opening thereof; wherein a second surface of one of said first and said second interposer substrates carries another plurality of conductive elements projecting transversely therefrom and arranged for effecting an electrical connection between said second surface of said one of said first and said second interposer substrates to a carrier substrate.

Claim 14

The assembly according to claim 11 , wherein said active surface of said at least one first die is electrically connected to said first surface of said first interposer substrate with wire bonds and said active surface of said at least one second die is electrically connected to said first surface of said second interposer substrate with wire bonds.

Claim 15

The assembly according to claim 12 , further including a dielectric material disposed between said first and second interposer substrates and substantially encapsulating said wire bonds and said plurality of conductive elements.

Claim 16

The assembly according to claim 12 , wherein a transverse distance between said first and second interposer substrates is at least greater than a wire bond loop height.

Claim 17

The assembly according to claim 12 , wherein a transverse distance between said first and second interposer substrates is between one wire bond loop height and two wire bond loop heights.

Claim 18

The assembly according to claim 12 , wherein a transverse distance between said first and second interposer substrates is at least twice that of a wire bond loop height.

Claim 19

The assembly according to claim 11 , further including a dielectric material disposed between said first and second interposer substrates and substantially encapsulating said plurality of conductive elements.

Claim 20

The assembly of claim 11 , wherein said at least one opening of said first interposer substrate and said at least one opening of said second interposer substrate are at least partially mutually laterally offset.

Claim 21

The assembly of claim 11 , wherein said at least one opening of said first interposer substrate and said at least one opening of said second interposer substrate are fully mutually laterally offset.

Claim 22

The assembly of claim 19 , wherein said at least one first die and said at least one second die are respectively electrically connected to first surfaces of said first and second interposer substrates with wire bonds.

Claim 23

A semiconductor device assembly, comprising: a first interposer substrate having at least one semiconductor die secured thereto on one side thereof and a plurality of terminals in electrical communication with the at least one semiconductor die on an opposite side thereof; a second interposer substrate having at least one semiconductor die secured thereto on one side thereof and a plurality of terminals in electrical communication with the at least one semiconductor die on an opposite side thereof; the first and second interposer substrates being disposed in mutually parallel relationship and electrically connected through a first plurality of conductive elements extending transversely between the terminals of the first interposer substrate and the terminals of the second interposer substrate, wherein the first and second interposer substrates are oriented with no semiconductor dice located therebetween; and a second plurality of conductive elements extending transversely from a side of one of the first and second interposer substrates for connecting the assembly to a carrier substrate.

Claim 24

A semiconductor device assembly, comprising: a first interposer substrate having at least one semiconductor die secured thereto on one side thereof and a plurality of terminals in electrical communication with the at least one semiconductor die on an opposite side thereof; a second interposer substrate having at least one semiconductor die secured thereto on one side thereof and a plurality of terminals in electrical communication with the at least one semiconductor die on an opposite side thereof; the first and second interposer substrates being disposed in mutually parallel relationship and electrically connected through a first plurality of conductive elements extending transversely between the terminals of the first interposer substrate and the terminals of the second interposer substrate, wherein the first and second interposer substrates are oriented with no semiconductor dice located therebetween; and a second plurality of conductive elements extending transversely from a side of one of the first and second interposer substrates for connecting the assembly to a carrier substrate.

Claim 25

The assembly of claim 21 , wherein each of the at least one semiconductor die secured to each of the first and second interposer substrates is located with an active surface thereof facing its associated interposer substrate and extending over an opening therethrough, and further including elongated conductive elements extending from the active surface of each of the at least one semiconductor die through the opening in the associated interposer substrate to an opposing side of the associated interposer substrate.

Claim 26

The assembly of claim 22 , wherein the elongated conductive elements comprise wire bonds.

Claim 27

The assembly of claim 23 , further including a dielectric material disposed between the first and second interposer substrates and substantially encapsulating the wire bonds and the first plurality of conductive elements.

Claim 28

The assembly of claim 22 , wherein the elongated conductive elements comprise wire bonds, and at least one opening through the one of the first and second interposer substrates is at least partially laterally offset from at least one opening through another of the first and second interposer substrates.

Claim 29

The assembly of claim 25 , wherein each of the first and second interposer substrates includes a like number of openings therethrough and each opening through the one of the first and second interposer substrates is at least partially laterally offset from any opening in the other of the first and second interposer substrates.

Claim 30

The assembly of claim 25 , wherein each of the first and second interposer substrates includes a like number of openings therethrough and each opening through the one of the first and second interposer substrates is fully laterally offset from any opening in the other of the first and second interposer substrates.

Claim 31

The assembly of claim 21 , further comprising a carrier substrate electrically connected to the side of the one of the first and second interposer substrates through the second plurality of conductive elements.

Claim 32

The assembly of claim 28 , further including a dielectric material disposed between the side of the one of the first and second interposer substrates and the carrier substrate and substantially encapsulating the second plurality of conductive elements.