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US6555860B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Compositionally modified resistive electrode

Assignee: Intel Corp
•
Filing: 2001-01-25
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Granted: 2003-04-29
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Expires: 2021-01-25
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Abstract

Abstract An apparatus comprising a volume of memory material and a pair of spacedly disposed conductors. An electrode coupled to the volume of memory material and disposed between the volume of memory material and one conductor. The electrode comprises a first portion having a first thermal coefficient of resistivity and a second portion having a different second thermal coefficient of resistivity. A method including modifying the thermal coefficient of resisting of a portion of an electrode.

Inventors

  • 👤 Tyler A. Lowrey
  • 👤 Stephen J. Hudgens
  • 👤 Patrick Klersy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 10:53
CPC Classifications
H; H10; H10D; H10D48/00; H10D48/30; H10D48/32; H10D48/366; G; G11; G11C; G11C13/00; G11C13/0002; G11C13/0004; H10B; H10B63/00; H10B63/10

Claims Analysis

Total Claims: 38
Claim 1
Independent Claim 77 words
An apparatus comprising: a volume of memory material; a signal line; and an electrode coupled to the volume of memory material and disposed between the volume of memory material and the signal line, the electrode comprising a first portion having a first thermal coefficient of resistivity and a second portion having a second thennal coefficient of resistivity that has a less negative or a positive variation to positive temperature change than the first thermal coefficient of resistivity.
Claim 2
Independent Claim 77 words
An apparatus comprising: a volume of memory material; a signal line; and an electrode coupled to the volume of memory material and disposed between the volume of memory material and the signal line, the electrode comprising a first portion having a first thermal coefficient of resistivity and a second portion having a second thennal coefficient of resistivity that has a less negative or a positive variation to positive temperature change than the first thermal coefficient of resistivity.
Claim 3
Dependent Claim 35 words
The apparatus of claim 1 , wherein the first portion of the electrode has a first resistivity value and the second portion has a second resistivity value that is greater than the first resistivity value.
Claim 4
Dependent Claim 21 words
The apparatus of claim 2 , wherein the second portion of the electrode is disposed adjacent the volume of memory material.
Claim 5
Dependent Claim 37 words
The apparatus of claim 3 , wherein the first portion comprises two segments separated by the second portion, and one segment of the first material of the electrode is disposed directly adjacent the volume of memory material.
Claim 6
Dependent Claim 16 words
The apparatus of claim 4 , wherein the first portion of the electrode comprises polycrystalline silicon.
Claim 7
Dependent Claim 32 words
The apparatus of claim 5 , wherein the segment of the first portion disposed directly adjacent the volume of memory material is doped differently than the other segment of the first portion.
Claim 8
Dependent Claim 80 words
The apparatus of claim 3 , wherein the volume of memory material has two resistivity values, the volume of memory material being settable to one of the resistivity values in response to an electrical input signal, and wherein the distance between the volume of memory material and the conductor defines a depth of the electrode and a depth of the second material is related to a voltage required to set a resistivity value of the volume of the memory material.
Claim 9
Dependent Claim 20 words
The apparatus of claim 3 , wherein the second portion comprises one of silicon carbide, silicon dioxide, and silicon nitride.
Claim 10
Independent Claim 120 words
An apparatus comprising: a variable resistive element programmable to at least a first resistivity value and a second resistivity value; a heater element in thermal communication with the variable resistive element, the heater element comprising: a first zone having a first resistivity and a first thermal coefficient of resistivity; and a second zone having a second resistivity and a second thermal coefficient of resistivity, wherein the first resistivity is lower than the second resistivity, and wherein the second thermal coefficient of resistivity has a less negative or a positive variation to positive temperature change than the first thermal coefficient of resistivity; and a signal line, wherein the heater element is disposed between the variable resistive element and the signal line.
Claim 11
Independent Claim 120 words
An apparatus comprising: a variable resistive element programmable to at least a first resistivity value and a second resistivity value; a heater element in thermal communication with the variable resistive element, the heater element comprising: a first zone having a first resistivity and a first thermal coefficient of resistivity; and a second zone having a second resistivity and a second thermal coefficient of resistivity, wherein the first resistivity is lower than the second resistivity, and wherein the second thermal coefficient of resistivity has a less negative or a positive variation to positive temperature change than the first thermal coefficient of resistivity; and a signal line, wherein the heater element is disposed between the variable resistive element and the signal line.
Claim 12
Dependent Claim 37 words
The apparatus of claim 9 , wherein the first zone of the heater element comprises two segments separated by the second zone, and one segment of the first zone is disposed directly adjacent the chalcogenide memory element.
Claim 13
Dependent Claim 55 words
The apparatus of claim 9 , wherein the variable resistive element is settable to one of the first resistivity value and the second resistivity value in response to an electrical input signal, and a dimension of the second zone is related to a voltage required to set a resistivity value of the variable resistive element.
Claim 14
Independent Claim 107 words
An apparatus comprising: a plurality of memory elements, each memory element comprising a volume of memory material having two resistivity values, the volume of memory material being settable to one of the resistivity values in response to a selected electrical input signal; a signal line coupled to each memory element; and a plurality of electrodes, an electrode coupled to a volume of memory material and disposed between the volume of memory material and the signal line, wherein each of the plurality of electrodes comprises a first portion having a first resistivity value and a second portion having a second resistivity value different than the first resistivity value.
Claim 15
Independent Claim 107 words
An apparatus comprising: a plurality of memory elements, each memory element comprising a volume of memory material having two resistivity values, the volume of memory material being settable to one of the resistivity values in response to a selected electrical input signal; a signal line coupled to each memory element; and a plurality of electrodes, an electrode coupled to a volume of memory material and disposed between the volume of memory material and the signal line, wherein each of the plurality of electrodes comprises a first portion having a first resistivity value and a second portion having a second resistivity value different than the first resistivity value.
Claim 16
Dependent Claim 18 words
The apparatus of claim 12 , wherein the second resistivity value is greater than the first resistivity value.
Claim 17
Dependent Claim 21 words
The apparatus of claim 13 , wherein the second portion of the electrode is disposed adjacent the volume of memory material.
Claim 18
Dependent Claim 51 words
The apparatus of claim 12 , wherein the first portion of each electrode has a first thermal coefficient of resistivity and the second portion has a second thermal coefficient of resistivity that has a less negative or a positive variation to positive temperature change than the first thermal coefficient of resistivity.
Claim 19
Dependent Claim 40 words
The apparatus of claim 13 , wherein the first portion of each electrode comprises two segments separated by the second portion, and one segment of the first portion of each electrode is disposed directly adjacent the volume of memory material.
Claim 20
Dependent Claim 16 words
The apparatus of claim 16 , wherein the first portion of the electrode comprises polycrystalline silicon.
Claim 21
Dependent Claim 32 words
The apparatus of claim 17 , wherein the segment of the first portion disposed directly adjacent the volume of memory material is doped differently than the other segment of the first portion.
Claim 22
Dependent Claim 86 words
The apparatus of claim 14 , wherein each of the plurality of volumes of memory material has two resistance values, the volume of memory material being settable to one of the resistance values in response to a selected electrical input signal, and wherein the distance between the volume of memory material and the one contact defines a depth of the electrode and a depth of the second portion is related to a voltage required to set a resistance value of the volume of the memory material.
Claim 23
Dependent Claim 20 words
The apparatus of claim 14 , wherein the second material comprises one of silicon carbide, silicon dioxide, and silicon nitride.
Claim 24
Independent Claim 94 words
A method comprising: introducing, between signal lines formed on a substrate, an electrode material; modifying a portion of the electrode material so that the electrode material comprises a first portion having a first thermal coefficient of resistivity and a second portion having a different second thermal coefficient of resistivity; and introducing a volume of memory material over the electrode material, the electrode material and the volume of memory material coupled to the signal lines, wherein the electrode material is disposed between the volume of memory material and at least one of the signal lines.
Claim 25
Independent Claim 94 words
A method comprising: introducing, between signal lines formed on a substrate, an electrode material; modifying a portion of the electrode material so that the electrode material comprises a first portion having a first thermal coefficient of resistivity and a second portion having a different second thermal coefficient of resistivity; and introducing a volume of memory material over the electrode material, the electrode material and the volume of memory material coupled to the signal lines, wherein the electrode material is disposed between the volume of memory material and at least one of the signal lines.
Claim 26
Dependent Claim 38 words
The method of claim 21 , wherein the electrode material comprises polycrystalline silicon and modifying the chemical structure of a portion of the electrode material comprises introducing a modifying agent that changes the resistivity of the polycrystalline silicon.
Claim 27
Dependent Claim 56 words
The method of claim 22 , wherein the distance between the volume of memory material and the one contact defines a depth of the electrode material and introducing the modifying agent comprises implanting the modifying agent to a depth related to a voltage required to set a resistance value of the volume of the memory material.
Claim 28
Dependent Claim 36 words
The method of claim 23 , wherein implanting to a depth comprises implanting the modifying agent such that a first portion of the electrode material comprising polycrystalline silicon is directly adjacent the volume of memory material.
Claim 29
Independent Claim 145 words
An apparatus comprising: a dedicated memory chip having a plurality of address lines, addressing circuitry coupled to the address lines, a plurality of memory elements, each of the plurality of memory elements including a volume of memory material having two resistivity values, the volume of memory material being settable to one of the resistivity values in response to a selected electrical input signal, a signal line coupled to each of the plurality of memory elements, and a plurality of electrodes, each of the plurality of electrodes coupled to a volume of memory material of respective ones of the plurality of memory elements and disposed between the volume of memory material and the signal line, wherein each of the plurality of electrodes comprises a first portion having a first resistivity value and a second portion having a second resistivity value different than the first resistivity value.
Claim 30
Independent Claim 145 words
An apparatus comprising: a dedicated memory chip having a plurality of address lines, addressing circuitry coupled to the address lines, a plurality of memory elements, each of the plurality of memory elements including a volume of memory material having two resistivity values, the volume of memory material being settable to one of the resistivity values in response to a selected electrical input signal, a signal line coupled to each of the plurality of memory elements, and a plurality of electrodes, each of the plurality of electrodes coupled to a volume of memory material of respective ones of the plurality of memory elements and disposed between the volume of memory material and the signal line, wherein each of the plurality of electrodes comprises a first portion having a first resistivity value and a second portion having a second resistivity value different than the first resistivity value.
Claim 31
Dependent Claim 18 words
The apparatus of claim 25 , wherein the second resistivity value is greater than the first resistivity value.
Claim 32
Dependent Claim 34 words
The apparatus of claim 26 , wherein the second portion of each of the plurality of electrodes is disposed adjacent the volume of memory material of respective ones of the plurality of memory elements.
Claim 33
Dependent Claim 55 words
The apparatus of claim 25 , wherein the first portion of each of the plurality of electrodes has a first thermal coefficient of resistivity and the second portion has a second thermal coefficient of resistivity that has a less negative or a positive variation to positive temperature change than the first thermal coefficient of resistivity.
Claim 34
Dependent Claim 57 words
The apparatus of claim 26 , wherein the first portion of each of the plurality of electrodes comprises two segments separated by the second portion, and one segment of the first portion of each of the plurality of electrodes is disposed directly adjacent the volume of memory material of respective ones of the plurality of memory elements.
Claim 35
Dependent Claim 20 words
The apparatus of claim 29 , wherein the first portion of each of the plurality of electrodes comprises polycrystalline silicon.
Claim 36
Dependent Claim 32 words
The apparatus of claim 30 , wherein the segment of the first portion disposed directly adjacent the volume of memory material is doped differently than the other segment of the first portion.
Claim 37
Dependent Claim 87 words
The apparatus of claim 27 , wherein the volume of memory material has two resistance values, the volume of memory material being settable to one of the resistance values in response to a selected electrical input signal, and wherein the distance between the volume of memory material and the conductor defines a depth of the respective one of the plurality of electrodes and a depth of the second portion is related to a voltage required to set a resistance value of the volume of the memory material.
Claim 38
Dependent Claim 20 words
The apparatus of claim 27 , wherein the second material comprises one of silicon carbide, silicon dioxide, and silicon nitride.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-04-28 2006-10-28 2007-04-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-04-28 2010-10-28 2011-04-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-04-28 2014-10-28 2015-04-29 $7700.00 Window Closed / Lapsed

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