US6495474B1 — Method of fabricating a dielectric layer

Claim 1

Independent Claim 54 words

A method of fabricating a semiconductor device comprising: forming a gate dielectric layer on a semiconductor substrate; and implanting the gate dielectric layer with ions from at least one of Zr, Hf, La, Y, Al, Ti and Ta wherein approximately 6-10% of the atoms in the implanted gate dielectric layer are the implanted ions.

Claim 2

Independent Claim 54 words

A method of fabricating a semiconductor device comprising: forming a gate dielectric layer on a semiconductor substrate; and implanting the gate dielectric layer with ions from at least one of Zr, Hf, La, Y, Al, Ti and Ta wherein approximately 6-10% of the atoms in the implanted gate dielectric layer are the implanted ions.

Claim 3

Dependent Claim 24 words

The method of claim 1 , wherein the gate dielectric layer comprises at least one of silicon dioxide, silicon oxynitride, and a silicon-oxide-silicon nitride.

Claim 4

Dependent Claim 23 words

The method of claim 2 , wherein the gate dielectric layer is thermally grown and has a thickness of at least 15 Å.

Claim 5

Dependent Claim 29 words

The method of claim 2 , wherein the step of implanting the gate dielectric layer with ions is performed at an implant energy level of at most 5 keV.

Claim 6

Dependent Claim 33 words

The method of claim 2 , wherein the step of ion implanting the gate dielectric layer with ions employs a dopant dosage of 1×10 15 atoms/cm 2 to 1×10 16 atoms/cm 2 .

Claim 7

Dependent Claim 26 words

The method of claim 2 , further comprising annealing the implanted gate dielectric layer at a temperature in the range of 600° C. to 1100° C.

Claim 8

Dependent Claim 77 words

The method of claim 6 , wherein the annealed gate dielectric layer has a thickness of approximately 100 Å, is implanted using a dopant ion dosage in the range of about 3×10 15 atoms/cm 2 and 5×10 15 atoms/cm 2 and an implant energy level of approximately 0.5 keV has a breakdown field of at least 5 MV/cm and a leakage current in the approximate range of 1×10 −6 A/cm 2 and 1×10 −2 A/cm 2 .

Claim 9

Independent Claim 98 words

A method of forming a dielectric layer, the method comprising the steps of: forming a dielectric layer on a semiconductor substrate; and ion implanting the dielectric layer with ions from at least one of Zr, Hf, La, Y, Al, Ti and Ta, at a dosage of 1×10 15 atoms/cm 2 to 1×10 16 atoms/cm 2 , and an implant energy level of at most 5 keV; and annealing the ion implanted dielectric layer to a temperature in the range of 600° C. to 1100° C. for in the range of one (1) second and twenty four (24) hours.

Claim 10

Independent Claim 98 words

A method of forming a dielectric layer, the method comprising the steps of: forming a dielectric layer on a semiconductor substrate; and ion implanting the dielectric layer with ions from at least one of Zr, Hf, La, Y, Al, Ti and Ta, at a dosage of 1×10 15 atoms/cm 2 to 1×10 16 atoms/cm 2 , and an implant energy level of at most 5 keV; and annealing the ion implanted dielectric layer to a temperature in the range of 600° C. to 1100° C. for in the range of one (1) second and twenty four (24) hours.

Claim 11

Dependent Claim 22 words

The method of claim 8 , wherein the dielectric layer comprises at least one of silicon dioxide, silicon oxynitride, and silicon-oxide-silicon nitride.

Claim 12

Dependent Claim 31 words

The method of claim 9 , wherein approximately 6∝10% of the total atoms in the implanted dielectric layer are at least one of Zr, Hf, La, Y, Al, Ti and Ta.

Claim 13

Independent Claim 72 words

A method of forming a dielectric layer, the method comprising the steps of: forming a dielectric layer on a semiconductor substrate; and implanting a dielectric layer with ions from a transition metal having a higher dielectric constant than the dielectric layer at an implant energy level of at most 5.0 keV wherein approximately 6-10% of the atoms in the implanted dielectric layer are the implanted ions; and annealing the implanted dielectric layer.

Claim 14

Independent Claim 72 words

A method of forming a dielectric layer, the method comprising the steps of: forming a dielectric layer on a semiconductor substrate; and implanting a dielectric layer with ions from a transition metal having a higher dielectric constant than the dielectric layer at an implant energy level of at most 5.0 keV wherein approximately 6-10% of the atoms in the implanted dielectric layer are the implanted ions; and annealing the implanted dielectric layer.

Claim 15

Independent Claim 24 words

The method of claim of 11 , wherein the transition metal comprises at least one of Zr, Hf, La, Y, Al, Ti and Ta.

Claim 16

Dependent Claim 22 words

The method of claim 12 , wherein the dielectric layer comprises at least one of silicon dioxide, silicon oxynitride, and silicon-oxide-silicon nitride.

Claim 17

Dependent Claim 39 words

The method of claim 12 , wherein the dielectric layer has a thickness of at least 20 Å and comprises at least one of thermally grown silicon dioxide, thermally grown silicon oxynitride and a thermally grown silicon oxide-silicon nitride.

Claim 18

Dependent Claim 23 words

The method of claim 12 , wherein the step of implanting the dielectric layer is performed at an implant energy of 5.0 keV.

Claim 19

Dependent Claim 31 words

The method of claim 12 , wherein the step of implanting the dielectric layer with ions employs a dopant dosage of 1×10 15 atoms/cm 2 to 1×10 16 atoms/cm 2 .

Claim 20

Dependent Claim 29 words

The method of claim 12 , further comprising the step of annealing the implanted dielectric layer to a temperature substantially in the range of 600° C. to 1100° C.

Claim 21

Dependent Claim 70 words

The method of claim 14 , wherein the annealed implanted dielectric layer has a thickness of approximately 100 Å, is implanted using a dopant ion dosage of approximately 3×10 15 atoms/cm 2 and an implant energy level of at most 5.0 keV and has a breakdown field of at least 5 MV/cm, and a leakage current in the range of 1×10 −6 A/cm 2 and 1×10 −2 A/cm 2 .

Claim 22

Dependent Claim 42 words

A transistor comprising an implanted and annealed gate dielectric layer, the implanted and annealed gate dielectric layer comprising at least one of Zr, Hf, La, Y, Al, Ti and Ta which constitute 6% to 10% of the atoms in the implanted layer.

Claim 23

Dependent Claim 42 words

A transistor comprising an implanted and annealed gate dielectric layer, the implanted and annealed gate dielectric layer comprising at least one of Zr, Hf, La, Y, Al, Ti and Ta which constitute 6% to 10% of the atoms in the implanted layer.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2005-12-16	2006-06-17	2006-12-17	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2009-12-16	2010-06-17	2010-12-17	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2013-12-16	2014-06-17	2014-12-17	$7700.00	Window Closed / Lapsed

Method of fabricating a dielectric layer

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