US6469343B1
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Multi-level type nonvolatile semiconductor memory device
Assignee: FOOTHILLS IP LLC
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Filing: 2000-10-05
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Granted: 2002-10-22
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Expires: 2020-10-05
Abstract
Abstract A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode. The electric charge-capturing film has a multi-layer structure in which at least four insulating films and at least three dielectric films each working as an electric charge accumulation layer are alternatingly laminated one upon the other, the lowermost insulating film among the at least four insulating films is formed as a gate-insulating film, a plurality of different threshold voltages are set to the at least three dielectric films to correspond to their electric charge-capturing states, and at least four kinds of memory states are specified depending upon the plurality of threshold voltages. This constitution makes it possible to easily and reliably adjust the amount of electric charge to be captured and, hence, to store desired multi-value data while preventing the occurrence of an inconvenience such as data corruption.
Inventors
- 👤 Hirotomo Miura
- 👤 Yasuo Sato
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 16:33
CPC Classifications
H; H10; H10B; H10B43/00; H10B43/30; G; G11; G11C; G11C11/00; G11C11/56; G11C11/5621; G11C11/5628; G11C11/5642; G11C11/5657; G11C11/5671; G11C16/00; G11C16/02; G11C16/04; G11C16/0466; H10B69/00; H10D; H10D30/00; H10D30/60; H10D30/69; H10D30/691
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
183 words
A semiconductor memory device having memory cells, wherein: each of said memory cells comprises at least a semiconductor substrate, a pair of impurity-diffused layers formed in said semiconductor substrate, an electric charge-capturing film, and a gate electrode formed on said electric charge-capturing film and working as a control electrode, said electric charge-capturing film comprises a first electric charge accumulation film, a first insulating film formed on said first electric charge accumulation film, and a second electric charge accumulation film formed on said first insulating film, wherein said first insulating film is a ferroelectric film, and the first and second electric charge accumulation films are film selected from the group consisting of platinum, a titanium compound, a tungsten compound, and a ruthenium compound; and said semiconductor memory device further includes a voltage application means for applying a predetermined voltage to said gate electrode and to said pair of impurity-diffused layers, and said voltage application means has a means for varying the accumulation of electric charge to stepwisely change the state of accumulating the electric charge in said first and second electric charge accumulation films.
Claim 2
Dependent Claim
183 words
A semiconductor memory device having memory cells, wherein: each of said memory cells comprises at least a semiconductor substrate, a pair of impurity-diffused layers formed in said semiconductor substrate, an electric charge-capturing film, and a gate electrode formed on said electric charge-capturing film and working as a control electrode, said electric charge-capturing film comprises a first electric charge accumulation film, a first insulating film formed on said first electric charge accumulation film, and a second electric charge accumulation film formed on said first insulating film, wherein said first insulating film is a ferroelectric film, and the first and second electric charge accumulation films are film selected from the group consisting of platinum, a titanium compound, a tungsten compound, and a ruthenium compound; and said semiconductor memory device further includes a voltage application means for applying a predetermined voltage to said gate electrode and to said pair of impurity-diffused layers, and said voltage application means has a means for varying the accumulation of electric charge to stepwisely change the state of accumulating the electric charge in said first and second electric charge accumulation films.
Claim 3
Dependent Claim
159 words
A semiconductor memory device having memory cells, wherein: each of said memory cells comprises at least a semiconductor substrate, a pair of impurity-diffused layers formed in said semiconductor substrate, an electric charge-capturing film, and a gate electrode formed on said electric charge-capturing film and working as a control electrode; and said electric charge-capturing film comprises a first insulating film formed on said semiconductor substrate, a first electric charge accumulation film formed on said first insulating film, a second insulating film formed on said first electric charge accumulation film, and a second electric charge accumulation film formed on said second insulating film, wherein at least one of said first and second insulating films includes a ferroelectric film, said first insulating film having a thickness different from that of said second insulating film, wherein the first and second electric charge accumulation films are films selected from the group consisting of platinum, a titanium compound, a tungsten compound, and a ruthenium compound.
Claim 4
Dependent Claim
159 words
A semiconductor memory device having memory cells, wherein: each of said memory cells comprises at least a semiconductor substrate, a pair of impurity-diffused layers formed in said semiconductor substrate, an electric charge-capturing film, and a gate electrode formed on said electric charge-capturing film and working as a control electrode; and said electric charge-capturing film comprises a first insulating film formed on said semiconductor substrate, a first electric charge accumulation film formed on said first insulating film, a second insulating film formed on said first electric charge accumulation film, and a second electric charge accumulation film formed on said second insulating film, wherein at least one of said first and second insulating films includes a ferroelectric film, said first insulating film having a thickness different from that of said second insulating film, wherein the first and second electric charge accumulation films are films selected from the group consisting of platinum, a titanium compound, a tungsten compound, and a ruthenium compound.
Claim 5
Dependent Claim
184 words
A semiconductor memory device having memory cells, wherein: each of said memory cells comprises at least a semiconductor substrate, a pair of impurity-diffused layers formed in said semiconductor substrate, an electric charge-capturing film, and a gate electrode formed on said electric charge-capturing film and working as a control electrode; and said electric charge-capturing film comprises a first insulating film formed on said semiconductor substrate, a first electric charge accumulation film formed on said first insulating film, a second insulating film formed on said first electric charge accumulation film, a second electric charge accumulation film formed on said second insulating film, and a third insulating film formed on said second electric charge accumulation film, said second insulating film having a thickness larger than that of said first insulating film, said third insulating film having a thickness larger than that of said second insulating film, and said first and second insulating films being formed by a ferroelectric film, wherein the first and second electric charge accumulation films are films selected from the group consisting of platinum, a titanium compound, a tungsten compound, and a ruthenium compound.
Claim 6
Dependent Claim
184 words
A semiconductor memory device having memory cells, wherein: each of said memory cells comprises at least a semiconductor substrate, a pair of impurity-diffused layers formed in said semiconductor substrate, an electric charge-capturing film, and a gate electrode formed on said electric charge-capturing film and working as a control electrode; and said electric charge-capturing film comprises a first insulating film formed on said semiconductor substrate, a first electric charge accumulation film formed on said first insulating film, a second insulating film formed on said first electric charge accumulation film, a second electric charge accumulation film formed on said second insulating film, and a third insulating film formed on said second electric charge accumulation film, said second insulating film having a thickness larger than that of said first insulating film, said third insulating film having a thickness larger than that of said second insulating film, and said first and second insulating films being formed by a ferroelectric film, wherein the first and second electric charge accumulation films are films selected from the group consisting of platinum, a titanium compound, a tungsten compound, and a ruthenium compound.
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