Patent US6376293B1 successfully refreshed from Google Patents.
US6376293B1
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US
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Shallow drain extenders for CMOS transistors using replacement gate design
Assignee: Texas Instruments Inc
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Filing: 2000-03-29
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Granted: 2002-04-23
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Expires: 2020-03-29
Abstract
Abstract A method of fabricating a CMOS transistor to construct shallow drain extenders (30) using a replacement gate design. The method involves forming epitaxial layers (30) and (220) the will later function as shallow drain extensions. The etching of the replacement gate (220) and the formation of inner sidewalls (90) serve to define the transistor gate length.
Inventors
- 👤 Richard A. Chapman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 13:14
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0167; H10D84/017; H10D84/0172; H10D84/02; H10D84/03; H10D84/038
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
153 words
A method of fabricating a transistor, comprising the steps of: providing a silicon substrate with an upper surface of a first conductivity type; forming a silicon epitaxial layer of a second conductivity type on said upper surface of said silicon substrate surface; forming a disposable gate over a first defined region of said silicon epitaxial layer; forming a plurality of outer sidewall structures adjacent to said disposable gate; forming a plurality of source/drain regions adjacent to said outer sidewall structures; forming an insulator layer over said source/drain regions; removing said disposable gate without substantially removing any other exposed material; forming a plurality of inner sidewall structures adjacent to said outer sidewall structures; removing said silicon epitaxial layer that lies between said inner sidewall structures thereby exposing a portion of said silicon substrate; forming a gate dielectric over said exposed portion of said silicon substrate; and forming a gate electrode over said gate dielectric.
Claim 2
Independent Claim
153 words
A method of fabricating a transistor, comprising the steps of: providing a silicon substrate with an upper surface of a first conductivity type; forming a silicon epitaxial layer of a second conductivity type on said upper surface of said silicon substrate surface; forming a disposable gate over a first defined region of said silicon epitaxial layer; forming a plurality of outer sidewall structures adjacent to said disposable gate; forming a plurality of source/drain regions adjacent to said outer sidewall structures; forming an insulator layer over said source/drain regions; removing said disposable gate without substantially removing any other exposed material; forming a plurality of inner sidewall structures adjacent to said outer sidewall structures; removing said silicon epitaxial layer that lies between said inner sidewall structures thereby exposing a portion of said silicon substrate; forming a gate dielectric over said exposed portion of said silicon substrate; and forming a gate electrode over said gate dielectric.
Claim 3
Dependent Claim
27 words
The method of claim 1 wherein said disposable gate layer comprises a material selected from the group consisting of: polysilicon, amorphous silicon, crystalline silicon and silicon nitride.
Claim 4
Dependent Claim
26 words
The method of claim 1 wherein said outer sidewall structure comprises a material selected from the group consisting of: silicon oxide. silicon nitride, and silicon oxynitride.
Claim 5
Dependent Claim
39 words
The method of claim 1 wherein said forming a plurality of source/drain regions further comprises the steps of: implanting a dopant species into said silicon substrate adjacent to said plurality of outer sidewall structures; and annealing said silicon substrate.
Claim 6
Dependent Claim
28 words
The method of claim 1 wherein said insulator layer comprises a material selected from the group consisting of: silicon oxide, CVD silicon oxide, PECVD TEOS, and HDP Oxide.
Claim 7
Dependent Claim
24 words
The method of claim 1 wherein said inner sidewall structure comprises a material selected from the group consisting of: silicon oxide and silicon nitride.
Claim 8
Dependent Claim
16 words
The method of claim 1 wherein said forming said gate dielectric comprises growing a dielectric film.
Claim 9
Dependent Claim
16 words
The method of claim 1 wherein said forming said gate dielectric comprises depositing a dielectric film.
Claim 10
Dependent Claim
25 words
The method of claim 1 wherein said gate dielectric comprises a material selected from the group consisting of: silicon oxide, silicon oxynitride, and silicon nitride.
Claim 11
Dependent Claim
55 words
The method of claim 1 wherein said forming said gate dielectric further comprises the steps of: forming a gate electrode film on said gate dielectric such that the surface of said gate electrode film is above the surface of said insulator layer; and patterning and etching said gate electrode film to form said gate electrode.
Claim 12
Dependent Claim
73 words
The method of claim 1 wherein said forming said gate dielectric further comprises the steps of: forming a gate electrode film on said gate dielectric such that the surface of said gate electrode film is above the surface of said insulator layer; and planarizing said gate electrode film using a chemical mechanical polish such that the surface of the gate electrode is about the same level as the surface of the insulator layer.
Claim 13
Dependent Claim
25 words
The method of claim 1 wherein said gate electrode comprises a material selected form the group consisting of: polysilicon, amorphous silicon, polygermanium, and a metal.
Claim 14
Independent Claim
139 words
A method of fabricating a transistor, comprising the steps of: providing a silicon substrate with an upper surface of a first conductivity type; forming a silicon epitaxial layer of a second conductivity type on said upper surface of said silicon substrate surface; forming disposable gate over a first defined region of said silicon epitaxial layer; forming a plurality of outer sidewall structures adjacent to said disposable gate; forming a plurality of source/drain regions adjacent to said outer sidewall structures; forming an insulator layer over said source/drain regions; removing said disposable gate without substantially removing any other exposed material; removing said silicon epitaxial layer that lies between said outer sidewall structures thereby exposing a portion of said silicon substrate; forming a gate dielectric over said exposed portion of said silicon substrate; and forming a gate electrode over said gate dielectric.
Claim 15
Independent Claim
139 words
A method of fabricating a transistor, comprising the steps of: providing a silicon substrate with an upper surface of a first conductivity type; forming a silicon epitaxial layer of a second conductivity type on said upper surface of said silicon substrate surface; forming disposable gate over a first defined region of said silicon epitaxial layer; forming a plurality of outer sidewall structures adjacent to said disposable gate; forming a plurality of source/drain regions adjacent to said outer sidewall structures; forming an insulator layer over said source/drain regions; removing said disposable gate without substantially removing any other exposed material; removing said silicon epitaxial layer that lies between said outer sidewall structures thereby exposing a portion of said silicon substrate; forming a gate dielectric over said exposed portion of said silicon substrate; and forming a gate electrode over said gate dielectric.
Claim 16
Dependent Claim
27 words
The method of claim 13 wherein said disposable gate layer comprises a material selected from the group consisting of: polysilicon, amorphous silicon, crystalline silicon and silicon nitride.
Claim 17
Dependent Claim
26 words
The method of claim 13 wherein said outer sidewall structure comprises a material selected from the group consisting of: silicon oxide, silicon nitride, and silicon oxynitride.
Claim 18
Dependent Claim
39 words
The method of claim 14 wherein said forming a plurality of source/drain regions further comprises the steps of: implanting a dopant species into said silicon substrate adjacent to said plurality of outer sidewall structures; and annealing said silicon substrate.
Claim 19
Dependent Claim
28 words
The method of claim 13 wherein said insulator layer comprises a material selected from the group consisting of: silicon oxide, CVD silicon oxide, PECVD TEOS, and HDP Oxide.
Claim 20
Dependent Claim
16 words
The method of claim 13 wherein said forming said gate dielectric comprises growing a dielectric film.
Claim 21
Dependent Claim
16 words
The method of claim 13 wherein said forming said gate dielectric comprises depositing a dielectric film.
Claim 22
Dependent Claim
25 words
The method of claim 13 wherein said gate dielectric comprises a material selected from the group consisting of: silicon oxide, silicon oxynitride, and silicon nitride.
Claim 23
Dependent Claim
55 words
The method of claim 13 wherein said forming said gate dielectric further comprises the steps of: forming a gate electrode film on said gate dielectric such that the surface of said gate electrode film is above the surface of said insulator layer; and patterning and etching said gate electrode film to form said gate electrode.
Claim 24
Dependent Claim
73 words
The method of claim 13 wherein said forming said gate dielectric further comprises the steps of: forming a gate electrode film on said gate dielectric such that the surface of said gate electrode film is above the surface of said insulator layer; and planarizing said gate electrode film using a chemical mechanical polish such that the surface of the gate electrode is about the same level as the surface of the insulator layer.
Claim 25
Dependent Claim
25 words
The method of claim 13 wherein said gate electrode comprises a material selected form the group consisting of: polysilicon, amorphous silicon, polygermanium, and a metal.
Claim 26
Independent Claim
112 words
A method of fabricating a transistor, comprising the steps of: providing a silicon substrate with an upper surface of a first conductivity type; forming a silicon epitaxial layer of a second conductivity type on said upper surface of said silicon substrate surface; forming a disposable gate over a first defined region of said silicon epitaxial layer; removing said disposable gate without substantially removing any other exposed material; removing said silicon epitaxial layer that is substantially exposed by said removing of said disposable gate thereby exposing a region of said silicon substrate; forming a gate dielectric over said exposed region of said silicon substrate; and forming a gate electrode over said gate dielectric.
Claim 27
Independent Claim
112 words
A method of fabricating a transistor, comprising the steps of: providing a silicon substrate with an upper surface of a first conductivity type; forming a silicon epitaxial layer of a second conductivity type on said upper surface of said silicon substrate surface; forming a disposable gate over a first defined region of said silicon epitaxial layer; removing said disposable gate without substantially removing any other exposed material; removing said silicon epitaxial layer that is substantially exposed by said removing of said disposable gate thereby exposing a region of said silicon substrate; forming a gate dielectric over said exposed region of said silicon substrate; and forming a gate electrode over said gate dielectric.
Claim 28
Dependent Claim
27 words
The method of claim 24 wherein said disposable gate layer comprises a material selected from the group consisting of: polysilicon, amorphous silicon, crystalline silicon and silicon nitride.
Claim 29
Dependent Claim
16 words
The method of claim 24 wherein said forming said gate dielectric comprises growing a dielectric film.
Claim 30
Dependent Claim
16 words
The method of claim 24 wherein said forming said gate dielectric comprises depositing a dielectric film.
Claim 31
Dependent Claim
25 words
The method of claim 24 wherein said gate dielectric comprises a material selected from the group consisting of: silicon oxide, silicon oxynitride, and silicon nitride.
Claim 32
Dependent Claim
55 words
The method of claim 24 wherein said forming said gate dielectric further comprises the steps of: forming a gate electrode film on said gate dielectric such that the surface of said gate electrode film is above the surface of said insulator layer; and patterning and etching said gate electrode film to form said gate electrode.
Claim 33
Dependent Claim
73 words
The method of claim 24 wherein said forming said gate dielectric further comprises the steps of: forming a gate electrode film on said gate dielectric such that the surface of said gate electrode film is above the surface of said insulator layer; and planarizing said gate electrode film using a chemical mechanical polish such that the surface of the gate electrode is about the same level as the surface of the insulator layer.
Claim 34
Dependent Claim
25 words
The method of claim 24 wherein said gate electrode comprises a material selected form the group consisting of: polysilicon, amorphous silicon, polygermanium, and a metal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2005-04-22 | 2005-10-22 | 2006-04-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-04-22 | 2009-10-22 | 2010-04-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-04-22 | 2013-10-22 | 2014-04-23 | $7700.00 | Window Closed / Lapsed |