US6180978B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Disposable gate/replacement gate MOSFETs for sub-0.1 micron gate length and ultra-shallow junctions
Assignee: Texas Instruments Inc
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Filing: 1998-12-18
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Granted: 2001-01-30
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Expires: 2018-12-18
Abstract
Abstract A counter-doped epitaxial silicon (doped opposite to the substrate type) is used to form the buried layer in a CMOS transistor, while maintaining an abrupt channel profile. Shallow source/drain junctions with abrupt source/drain profiles may be formed using raised (or elevated) source/drain design. The invention encompasses a transistor structure including a doped silicon substrate, and an oppositely-doped epitaxial silicon layer formed on the substrate. A gate is formed on the epitaxial layer, the gate defining a channel region in the epitaxial layer underneath the gate. A layer is formed on the epitaxial silicon layer on opposing sides of, and is electrically isolated from, the gate.
Inventors
- 👤 Amitava Chatterjee
- 👤 Richard A. Chapman
- 👤 Syed Suhail Murtaza
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 13:04
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/027; H10D30/0275; H10D30/0278; H10D30/60; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01324; H10D64/017; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0128; H10D84/0135; H10D84/014; H10D84/0165; H10D84/0167; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/83135; H10D84/85; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/10; H10W10/17; H10D84/8311
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
149 words
A replacement gate MOSFET, comprising: a doped silicon substrate; an oppositely doped epitaxial silicon layer formed on the doped silicon substrate; a gate oxide layer with a top surface and a bottom surface wherein said bottom surface of said gate oxide layer contacts said oppositely doped epitaxial silicon layer; a permanent gate on said gate oxide layer with a bottom surface, side surfaces, and a top surface wherein said bottom surface of said permanent gate contacts said top surface of said oxide layer; sidewall spacers formed on the side surfaces of said permanent gate; and lateral notches adjacent to either side of the bottom surface of said permanent gate, said lateral notches having bottom surfaces, side surfaces and top surfaces wherein said bottom surfaces of said lateral notches are formed by the gate oxide layer and said top surfaces of said lateral notches are formed by the sidewall spacers.
Claim 2
Dependent Claim
149 words
A replacement gate MOSFET, comprising: a doped silicon substrate; an oppositely doped epitaxial silicon layer formed on the doped silicon substrate; a gate oxide layer with a top surface and a bottom surface wherein said bottom surface of said gate oxide layer contacts said oppositely doped epitaxial silicon layer; a permanent gate on said gate oxide layer with a bottom surface, side surfaces, and a top surface wherein said bottom surface of said permanent gate contacts said top surface of said oxide layer; sidewall spacers formed on the side surfaces of said permanent gate; and lateral notches adjacent to either side of the bottom surface of said permanent gate, said lateral notches having bottom surfaces, side surfaces and top surfaces wherein said bottom surfaces of said lateral notches are formed by the gate oxide layer and said top surfaces of said lateral notches are formed by the sidewall spacers.
Claim 3
Dependent Claim
45 words
The replacement gate transistor of claim 1 , further comprising: raised source/drain layers formed over said epitaxial silicon layer on either side of the permanent gate and adjacent to said lateral notches; and portions of said permanent gate extending into and filling said lateral notches.
Claim 4
Dependent Claim
20 words
The replacement gate transistor of claim 2 wherein said top surface of said permanent gate extends beyond the sidewall spacers.
Claim 5
Dependent Claim
155 words
A replacement gate MOSFET, comprising: a doped silicon substrate; an oppositely doped epitaxial silicon layer formed on the doped silicon substrate; a gate oxide layer with a top surface and a bottom surface wherein a portion said bottom surface of said gate oxide layer contacts said oppositely doped epitaxial silicon layer; a permanent gate on said gate oxide layer with a bottom surface, side surfaces, and a top surface wherein said bottom surface of said permanent gate contacts said top surface of said oxide layer; sidewall spacers formed on the side surfaces of said permanent gate; and lateral notches adjacent to either side of the bottom surface of said permanent gate, said lateral notches having bottom surfaces, side surfaces and top surfaces wherein said bottom surfaces and said side surfaces of said lateral notches are formed by the gate oxide layer and said top surfaces of said lateral notches are formed by the sidewall spacers.
Claim 6
Dependent Claim
155 words
A replacement gate MOSFET, comprising: a doped silicon substrate; an oppositely doped epitaxial silicon layer formed on the doped silicon substrate; a gate oxide layer with a top surface and a bottom surface wherein a portion said bottom surface of said gate oxide layer contacts said oppositely doped epitaxial silicon layer; a permanent gate on said gate oxide layer with a bottom surface, side surfaces, and a top surface wherein said bottom surface of said permanent gate contacts said top surface of said oxide layer; sidewall spacers formed on the side surfaces of said permanent gate; and lateral notches adjacent to either side of the bottom surface of said permanent gate, said lateral notches having bottom surfaces, side surfaces and top surfaces wherein said bottom surfaces and said side surfaces of said lateral notches are formed by the gate oxide layer and said top surfaces of said lateral notches are formed by the sidewall spacers.
Claim 7
Dependent Claim
45 words
The replacement gate transistor of claim 4 , further comprising: raised source/drain layers formed over said epitaxial silicon layer on either side of the permanent gate and adjacent to said lateral notches; and portions of said permanent gate extending into and filling said lateral notches.
Claim 8
Dependent Claim
20 words
The replacement gate transistor of claim 5 wherein said top surface of said permanent gate extends beyond the sidewall spacers.
Claim 9
Dependent Claim
215 words
A replacement gate MOSFET, comprising: a doped silicon substrate; an oppositely doped epitaxial silicon layer formed on the doped silicon substrate; a gate oxide layer with a top surface and a bottom surface wherein said bottom surface of said gate oxide layer contacts said oppositely doped epitaxial silicon layer; a permanent gate on said gate oxide layer with a bottom surface, side surfaces, and a top surface wherein said bottom surface of said permanent gate contacts said top surface of said oxide layer; sidewall spacers formed on the side surfaces of said permanent gate; lateral notches adjacent to either side of the bottom surface of said permanent gate, said lateral notches having bottom surfaces, side surfaces and top surfaces wherein said bottom surfaces of said lateral notches are formed by the gate oxide layer and said top surfaces of said lateral notches are formed by the sidewall spacers; raised source/drain layers formed over said epitaxial silicon layer on either side of the permanent gate and adjacent to said lateral notches; a source region beneath said raised source/drain layers where a portion of said permanent gate overlaps a portion of said source region; and a drain region beneath said raised source/drain layers where a portion of said permanent gate overlaps a portion of said drain region.
Claim 10
Dependent Claim
215 words
A replacement gate MOSFET, comprising: a doped silicon substrate; an oppositely doped epitaxial silicon layer formed on the doped silicon substrate; a gate oxide layer with a top surface and a bottom surface wherein said bottom surface of said gate oxide layer contacts said oppositely doped epitaxial silicon layer; a permanent gate on said gate oxide layer with a bottom surface, side surfaces, and a top surface wherein said bottom surface of said permanent gate contacts said top surface of said oxide layer; sidewall spacers formed on the side surfaces of said permanent gate; lateral notches adjacent to either side of the bottom surface of said permanent gate, said lateral notches having bottom surfaces, side surfaces and top surfaces wherein said bottom surfaces of said lateral notches are formed by the gate oxide layer and said top surfaces of said lateral notches are formed by the sidewall spacers; raised source/drain layers formed over said epitaxial silicon layer on either side of the permanent gate and adjacent to said lateral notches; a source region beneath said raised source/drain layers where a portion of said permanent gate overlaps a portion of said source region; and a drain region beneath said raised source/drain layers where a portion of said permanent gate overlaps a portion of said drain region.
Claim 11
Dependent Claim
20 words
The replacement gate transistor of claim 7 wherein portions of said permanent gate extends into and fills said lateral notches.
References Cited (Backward Citations)
US4419810A
Cited
US4892837A
Cited
EP0480446A2
Cited
US5498567A
Cited
US5589410A
Cited
US5963791A
Cited
JPH0684939A
Cited
US5567966A
Cited
US5376578A
Cited
US5545578A
Cited
US6025235A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-01-30 | 2004-07-31 | 2005-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-01-30 | 2008-07-31 | 2009-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-01-30 | 2012-07-31 | 2013-01-30 | $7700.00 | Window Closed / Lapsed |