Method of manufacturing a flash memory having a select transistor

Claim 1

A method of manufacturing a nonvolatile memory semiconductor device having, on one and the same substrate, a flash memory area where a memory-transistor and a select-transistor are formed and a logic area where an adjacent circuit transistor is formed; which, at least, comprises the steps of: (1) growing an N − -type first polysilicon upon a semiconductor substrate on which an element isolation region and an oxide film are formed; (2) removing the first polysilicon overlying the element isolation region by etching; (3) growing a first insulating film over the entire surface so as to cover the remaining first polysilicon; (4) growing a second polysilicon as well as a nitride film over the entire surface; (5) forming a resist pattern at the position where electrodes of the memory-transistor are to be formed and, then, with said pattern used as a mask, carrying out etching of the nitride film, the second polysilicon and the first polysilicon; (6) removing the resist pattern, and thereafter forming another resist pattern at the positions where electrodes of the select-transistor and the adjacent circuit transistor are to be formed and, then, with said nitride film used as a mask for the memory-transistor and said pattern, for the select-transistor and the adjacent circuit transistor, carrying out etching of the first polysilicon; (7) removing said nitride film as well as said resist pattern, and thereafter, concurrently with forming source-drain regions, applying ion implantation to the second polysilicon which is to serve as a control gate of the memory-transistor and to the first polysilicon which is to serve as gate electrodes of the select-transistor and of the adjacent circuit transistor in the logic area; and (8) removing, by means of isotropic etching, the oxide film lying on the substrate surface other than the parts thereof underlying every transistor, to the level where the substrate surface is exposed.

Claim 2

A method of manufacturing a nonvolatile memory semiconductor device having, on one and the same substrate, a flash memory area where a memory-transistor and a select-transistor are formed and a logic area where an adjacent circuit transistor is formed; which, at least, comprises the steps of: (1) growing an N − -type first polysilicon upon a semiconductor substrate on which an element isolation region and an oxide film are formed; (2) removing the first polysilicon overlying the element isolation region by etching; (3) growing a first insulating film over the entire surface so as to cover the remaining first polysilicon; (4) growing a second polysilicon as well as a nitride film over the entire surface; (5) forming a resist pattern at the position where electrodes of the memory-transistor are to be formed and, then, with said pattern used as a mask, carrying out etching of the nitride film, the second polysilicon and the first polysilicon; (6) removing the resist pattern, and thereafter forming another resist pattern at the positions where electrodes of the select-transistor and the adjacent circuit transistor are to be formed and, then, with said nitride film used as a mask for the memory-transistor and said pattern, for the select-transistor and the adjacent circuit transistor, carrying out etching of the first polysilicon; (7) removing said nitride film as well as said resist pattern, and thereafter, concurrently with forming source-drain regions, applying ion implantation to the second polysilicon which is to serve as a control gate of the memory-transistor and to the first polysilicon which is to serve as gate electrodes of the select-transistor and of the adjacent circuit transistor in the logic area; and (8) removing, by means of isotropic etching, the oxide film lying on the substrate surface other than the parts thereof underlying every transistor, to the level where the substrate surface is exposed.