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US6265268B1
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High temperature oxide deposition process for fabricating an ONO floating-gate electrode in a two bit EEPROM device
Assignee: Monterey Research LLC
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Filing: 1999-10-25
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Granted: 2001-07-24
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Expires: 2019-10-25
Abstract
Abstract A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device includes the formation of a top oxide layer using a high-temperature-oxide (HTO) deposition process in which the HTO process is carried out at a temperature of about 700 to about 800° C. by either an LPCVD or RTCVD deposition processor. The process further includes the sequential formation of a silicon nitride layer and a top oxide layer using an in-situ LPCVD or RTCVD deposition process in which the silicon nitride layer is not exposed to ambient atmosphere prior to the formation of the top oxide layer. The formation of the top oxide layer using an HTO deposition process provides an improved two-bit EEPROM memory device by reducing charge leakage in the ONO floating-gate electrode.
Inventors
- 👤 Arvind Halliyal
- 👤 Robert B. Ogle
- 👤 Hideki Komori
- 👤 Kenneth Au
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:39
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/69; H10D30/691; H10D30/68; H10D30/687; H10D64/00; H10D64/01; H10D64/031; H10D64/037; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/66; H10P14/668; H10P14/6681; H10P14/6682
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
96 words
A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device comprising the steps of: providing a semiconductor substrate; thermally growing a first silicon oxide layer overlying the semiconductor substrate; forming a silicon nitride layer overlying the first silicon oxide layer; and maintaining at least two charge isolation regions in the silicon nitride layer by depositing a second layer of silicon oxide overlying the silicon nitride layer using a high temperature oxide deposition process, wherein the high temperature oxide deposition process is carried out at a temperature of about 700 to about 800° C.
Claim 2
Dependent Claim
96 words
A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device comprising the steps of: providing a semiconductor substrate; thermally growing a first silicon oxide layer overlying the semiconductor substrate; forming a silicon nitride layer overlying the first silicon oxide layer; and maintaining at least two charge isolation regions in the silicon nitride layer by depositing a second layer of silicon oxide overlying the silicon nitride layer using a high temperature oxide deposition process, wherein the high temperature oxide deposition process is carried out at a temperature of about 700 to about 800° C.
Claim 3
Dependent Claim
37 words
The process of claim 1 , wherein the step of depositing a second oxide layer comprises low pressure chemical vapor deposition using nitrous oxide and a second gas selected from the group consisting of silane and dichlorosilane.
Claim 4
Dependent Claim
41 words
The process of claim 2 , wherein the step of depositing a second oxide layer comprises low pressure chemical vapor deposition using about 0.5 to about 2 slpm nitrous oxide and about 10 to about 50 sccm of the second gas.
Claim 5
Dependent Claim
26 words
The process of claim 1 , wherein the step of depositing a second oxide layer comprises rapid thermal chemical vapor deposition using nitrous oxide and dichlorosilane.
Claim 6
Dependent Claim
54 words
The process of claim 4 , wherein the step of depositing a second oxide layer comprises rapid thermal chemical vapor deposition using about 1 to about 3 slpm nitrous oxide and about 25 to about 75 sccm dichlorosilane to form a silicon oxide layer having a thickness of about 50 to about 150 angstroms.
Claim 7
Dependent Claim
48 words
The process of claim 1 , wherein the step of depositing a silicon nitride layer comprises rapid thermal chemical vapor deposition using about 0.5 to 2 slpm ammonia and about 20 to about 50 sccm of a second gas selected from the group consisting of silane and dichlorosilane.
Claim 8
Dependent Claim
64 words
The process of claim 1 , wherein the step of forming a silicon nitride layer and the step of depositing a second silicon oxide layer comprises a process selected from the group consisting of RTCVD and LPCVD, wherein the both the silicon nitride layer and the second silicon oxide layer are sequentially formed in a processing apparatus in the absence exposure to ambient atmosphere.
Claim 9
Dependent Claim
165 words
A process for fabricating a stacked-gate structure including an ONO floating-gate electrode in a two-bit EEPROM device comprising the steps of: providing a semiconductor substrate having a first bit-line oxide layer and a second bit-line oxide layer therein separated by a substrate surface region; forming an ONO layer on the substrate surface region by first, thermally growing a first silicon oxide layer on the substrate surface region, second, forming a silicon nitride layer overlying the first silicon oxide layer; and third, maintaining at least two charge isolation regions in the silicon nitride layer by depositing a second layer of silicon oxide overlying the silicon nitride layer using a high temperature oxide deposition process, wherein the high temperature oxide deposition process is carried out at a temperature of about 700 to about 800° C.; depositing a gate electrode layer overlying the ONO layer; and forming a stacked-gate structure on the substrate surface region, wherein the stacked-gate structure includes a control-gate electrode overlying an ONO floating-gate electrode.
Claim 10
Dependent Claim
165 words
A process for fabricating a stacked-gate structure including an ONO floating-gate electrode in a two-bit EEPROM device comprising the steps of: providing a semiconductor substrate having a first bit-line oxide layer and a second bit-line oxide layer therein separated by a substrate surface region; forming an ONO layer on the substrate surface region by first, thermally growing a first silicon oxide layer on the substrate surface region, second, forming a silicon nitride layer overlying the first silicon oxide layer; and third, maintaining at least two charge isolation regions in the silicon nitride layer by depositing a second layer of silicon oxide overlying the silicon nitride layer using a high temperature oxide deposition process, wherein the high temperature oxide deposition process is carried out at a temperature of about 700 to about 800° C.; depositing a gate electrode layer overlying the ONO layer; and forming a stacked-gate structure on the substrate surface region, wherein the stacked-gate structure includes a control-gate electrode overlying an ONO floating-gate electrode.
Claim 11
Dependent Claim
37 words
The process of claim 8 , wherein the step of depositing a second oxide layer comprises low pressure chemical vapor deposition using nitrous oxide and a second gas selected from the group consisting of silane and dichlorosilane.
Claim 12
Dependent Claim
37 words
The process of claim 9 , wherein the step of depositing a second oxide layer comprises low-pressure-chemical-vapor-deposition using about 0.5 to about 2 slpm nitrous oxide and about 10 to about 50 slpm of the second gas.
Claim 13
Dependent Claim
26 words
The process of claim 8 , wherein the step of depositing a second oxide layer comprises rapid thermal chemical vapor deposition using nitrous oxide and dichlorosilane.
Claim 14
Dependent Claim
54 words
The process of claim 11 , wherein the step of depositing a second oxide layer comprises rapid thermal chemical vapor deposition using about 1 to about 3 slpm nitrous oxide and about 25 to about 75 sccm dichlorosilane to form a silicon oxide layer having a thickness of about 50 to about 150 angstroms.
Claim 15
Dependent Claim
42 words
The process of claim 8 , wherein the step of depositing a silicon nitride layer comprises rapid-thermal-chemical-vapor-deposition using about 1 slpm ammonia and about 30 to about 50 sccm of a second gas selected from the group consisting of silane and dichlorosilane.
Claim 16
Dependent Claim
64 words
The process of claim 8 , wherein the step of forming a silicon nitride layer and the step of depositing a second silicon oxide layer comprises a process selected from the group consisting of RTCVD and LPCVD, wherein the both the silicon nitride layer and the second silicon oxide layer are sequentially formed in a processing apparatus in the absence exposure to ambient atmosphere.
Claim 17
Dependent Claim
122 words
A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device comprising the steps of: providing a semiconductor substrate having a silicon surface region; thermally growing a silicon oxide layer overlying the surface region; and depositing a silicon nitride layer overlying the silicon oxide layer and a top silicon oxide layer using a deposition process selected from the group consisting of RTCVD and LPCVD; wherein at least two charge isolation regions are maintained in the silicon nitride layer by carrying out the silicon nitride layer and the top silicon oxide layer are sequentially deposited in the absence of exposure to ambient atmosphere; and wherein the deposition process is carried out at a temperature of about 700 to about 800° C.
Claim 18
Dependent Claim
122 words
A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device comprising the steps of: providing a semiconductor substrate having a silicon surface region; thermally growing a silicon oxide layer overlying the surface region; and depositing a silicon nitride layer overlying the silicon oxide layer and a top silicon oxide layer using a deposition process selected from the group consisting of RTCVD and LPCVD; wherein at least two charge isolation regions are maintained in the silicon nitride layer by carrying out the silicon nitride layer and the top silicon oxide layer are sequentially deposited in the absence of exposure to ambient atmosphere; and wherein the deposition process is carried out at a temperature of about 700 to about 800° C.
Claim 19
Dependent Claim
52 words
The process of claim 15 , wherein the step of depositing a second oxide layer comprises an RTCVD process using about 1 to about 3 slpm nitrous oxide and about 25 to about 75 sccm dichlorosilane to form a silicon oxide layer having a thickness of about 50 to about 150 angstroms.
Claim 20
Dependent Claim
33 words
The process of claim 16 , wherein the RTCVD process comprises a three step sequence including a temperature ramp up step, a deposition step of about 1 minute, and a cool down step.
Claim 21
Dependent Claim
45 words
The process of claim 17 , wherein the step of depositing a silicon nitride layer using an RTCVD process comprises using about 1 slpm ammonia and about 30 to about 50 sccm of a second gas selected from the group consisting of silane and dichlorosilane.
Claim 22
Dependent Claim
33 words
The process of claim 18 , wherein the RTCVD process comprises a three step sequence including a temperature ramp up step, a deposition step of about 2 minutes, and a cool down step.
Claim 23
Dependent Claim
41 words
The process of claim 19 , wherein the RTCVD process forms the silicon nitride layer to a thickness of about 50 to about 150 angstroms and the top silicon oxide layer to a thickness of about 50 to about 150 angstrons.
Claim 24
Dependent Claim
16 words
The process of claim 15 , wherein the deposition process comprises LPCVD using a batch-type furnace.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-07-23 | 2005-01-22 | 2005-07-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-07-23 | 2009-01-22 | 2009-07-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-07-23 | 2013-01-22 | 2013-07-24 | $7700.00 | Window Closed / Lapsed |