Patent US6259271B1 successfully refreshed from Google Patents.
US6259271B1
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Configuration memory integrated circuit
Assignee: Altera Corp
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Filing: 2000-06-15
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Granted: 2001-07-10
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Expires: 2020-06-15
Abstract
Abstract A configuration memory for storing information which is in-system programmable. The programming of the configuration memory may be performed using JTAG (IEEE Standard 1149.1) instructions. Furthermore, the configuration of a programmable logic device using the configuration data in the configuration memory may be initiated with a JTAG instruction. Pull-up resistors are incorporated within the configuration memory package.
Inventors
- 👤 Chris Couts-Martin
- 👤 Alan Herrmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 09:36
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G11; G11C; G11C29/00; G11C29/04; G11C29/08; G11C29/48; H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17704; H03K19/17748; H03K19/1776
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
109 words
A configuration memory for use in storing information comprising: a substrate; a memory array formed on the substrate for storing said information; a data out port formed on the substrate and coupled with said memory array, wherein said information is transferable from said memory array out of said configuration memory through said data out port; a JTAG port formed on the substrate and coupled with said memory array for receiving JTAG instructions; and JTAG circuitry formed on the substrate, said JTAG circuitry being capable of receiving one of a group of JTAG instructions from said JTAG port and controlling operation of said configuration memory according to said JTAG instruction.
Claim 2
Dependent Claim
109 words
A configuration memory for use in storing information comprising: a substrate; a memory array formed on the substrate for storing said information; a data out port formed on the substrate and coupled with said memory array, wherein said information is transferable from said memory array out of said configuration memory through said data out port; a JTAG port formed on the substrate and coupled with said memory array for receiving JTAG instructions; and JTAG circuitry formed on the substrate, said JTAG circuitry being capable of receiving one of a group of JTAG instructions from said JTAG port and controlling operation of said configuration memory according to said JTAG instruction.
Claim 3
Dependent Claim
16 words
The configuration memory of claim 1 wherein said memory array is programmable via said JTAG port.
Claim 4
Dependent Claim
13 words
The configuration memory of claim 1 wherein said memory array is in-system programmable.
Claim 5
Dependent Claim
18 words
The configuration memory of claim 1 wherein said information is configuration data for configuring a programmable logic device.
Claim 6
Dependent Claim
18 words
The configuration memory of claim 1 wherein said information is transferable responsive to receipt of said JTAG instruction.
Claim 7
Dependent Claim
37 words
The configuration memory of claim 1 wherein said memory array further comprises: an output terminal, said output terminal being changed from a first logic state to a second logic state responsive to receipt of said JTAG instruction.
Claim 8
Independent Claim
74 words
A method of programming a configuration memory having a memory array and JTAG circuitry formed on a single substrate and capable of receiving one of a group of JTAG instructions from a JTAG port and controlling operation of said configuration memory according to said JTAG instruction comprising the steps of: sending said JTAG instruction to said JTAG port; and transferring configuration data to said memory array of said configuration memory through said JTAG port.
Claim 9
Independent Claim
74 words
A method of programming a configuration memory having a memory array and JTAG circuitry formed on a single substrate and capable of receiving one of a group of JTAG instructions from a JTAG port and controlling operation of said configuration memory according to said JTAG instruction comprising the steps of: sending said JTAG instruction to said JTAG port; and transferring configuration data to said memory array of said configuration memory through said JTAG port.
Claim 10
Dependent Claim
19 words
The method of claim 7 wherein said configuration data is stored on a diskette prior to said transferring step.
Claim 11
Dependent Claim
16 words
The method of claim 7 wherein said configuration data is generated by a computer software program.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-07-09 | 2005-01-08 | 2005-07-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-07-09 | 2009-01-08 | 2009-07-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-07-09 | 2013-01-08 | 2013-07-10 | $7700.00 | Window Closed / Lapsed |