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Process for fabricating integrated circuit devices having thin film transistors

Assignee: Nokia of America Corp
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Filing: 1999-12-07
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Granted: 2001-03-06
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Expires: 2019-12-07
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Abstract

Abstract A process for fabricating an integrated circuit device is disclosed. The integrated circuit has a plurality of TFTs and an electrical interconnect structure. In the process, at least some constituents of the TFTs are formed on a first substrate. At least the interconnect structure is formed on a second substrate. The two substrates are laminated together to form the integrated circuit device having fully formed TFTs.

Inventors

  • 👤 Edwin Arthur Chandross
  • 👤 Ananth Dodabalapur
  • 👤 Howard Edan Katz
  • 👤 Venkataram Reddy Raju

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 12:01
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6758; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0316; H10D30/0321; H10K; H10K10/00; H10K10/40; H10K10/46; H10K10/462; H10K10/466; H10D30/674; H10D30/675; H10K71/00; H10K71/60; H10K85/00; H10K85/10; H10K85/111; H10K85/113

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 53 words
A process for integrated circuit device fabrication comprising: forming at least a portion of a thin film transistor on a first flexible substrate; forming an interconnect structure on a second flexible substrate; laminating the first flexible substrate to the second flexible substrate, thereby electrically interconnecting the thin film transistor with the interconnect structure.
Claim 2
Dependent Claim 53 words
A process for integrated circuit device fabrication comprising: forming at least a portion of a thin film transistor on a first flexible substrate; forming an interconnect structure on a second flexible substrate; laminating the first flexible substrate to the second flexible substrate, thereby electrically interconnecting the thin film transistor with the interconnect structure.
Claim 3
Dependent Claim 23 words
The process of claim 1 wherein the thin film transistor comprises a gate, a gate dielectric, a semiconductor, a source and a drain.
Claim 4
Dependent Claim 17 words
The process of claim 2 wherein the entire thin film transistor is formed on the first substrate.
Claim 5
Dependent Claim 39 words
The process of claim 2 wherein the gate, gate dielectric and semiconductor of the thin film device are formed on the first substrate and the source and drain of the thin film device are formed on the second substrate.
Claim 6
Dependent Claim 12 words
The process of claim 4 wherein the semiconductor is an organic semiconductor.
Claim 7
Dependent Claim 12 words
The process of claim 4 wherein the semiconductor is an inorganic semiconductor.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-03-05 2004-09-04 2005-03-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-03-05 2008-09-04 2009-03-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-03-05 2012-09-04 2013-03-06 $7700.00 Window Closed / Lapsed

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