Patent US6141237A successfully refreshed from Google Patents.
US6141237A
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Ferroelectric non-volatile latch circuits
Assignee: Monterey Research LLC
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Filing: 1999-07-12
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Granted: 2000-10-31
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Expires: 2019-07-12
Abstract
Abstract A non-volatile ferroelectric latch includes a sense amplifier having at least one input/output coupled to a bit-line node, a ferroelectric storage capacitor coupled between a plate-line node and the bit-line node, and a load element coupled to the bit-line node. The sense amplifier further includes a second input/output coupled to a second bit-line node and the latch further includes a second ferroelectric storage capacitor coupled between a second plate-line node and the second bit-sine node, and a second load element coupled to the second bit-line node. The load element includes a dynamic, switched ferroelectric capacitor a static, nonswitched ferroelectric capacitor, a linear capacitor, or even a resistive load.
Inventors
- 👤 Jarrod Eliason
- 👤 William F. Kraus
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:39
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/22; G11C14/00; G11C14/0054; G11C14/0072; G11C11/221
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
57 words
A non-volatile ferroelectric latch comprising: a sense amplifier having first and second input/outputs coupled respectively coupled to first and second internal bit-line nodes; a pair of balanced ferroelectric capacitors coupled between the first and second internal bit-line nodes; and isolation circuitry coupled between the first and second internal bit-line nodes and first and second external bit-line nodes.
Claim 2
Dependent Claim
57 words
A non-volatile ferroelectric latch comprising: a sense amplifier having first and second input/outputs coupled respectively coupled to first and second internal bit-line nodes; a pair of balanced ferroelectric capacitors coupled between the first and second internal bit-line nodes; and isolation circuitry coupled between the first and second internal bit-line nodes and first and second external bit-line nodes.
Claim 3
Dependent Claim
70 words
The non-volatile ferroelectric latch as in claim 1 in which the pair of balanced ferroelectric capacitors comprises: a first ferroelectric capacitor having a top electrode coupled to the first internal bit-line node, and a bottom electrode coupled to the second internal bit-line node; and a second ferroelectric capacitor having a bottom electrode coupled to the first internal bit-line node, and a top electrode coupled to the second internal bit-line node.
Claim 4
Dependent Claim
75 words
The non-volatile ferroelectric latch as in claim 1 in which the isolation circuitry comprises: a first transistor having a gate and a current path coupled between first internal bit-line node and the first external bit-line node; and a second transistor having a gate and a current path coupled between the second internal bit-line node and the second external bit-line node, wherein the gates of the first and second transistors are coupled to a word-line node.
Claim 5
Dependent Claim
17 words
The non-volatile ferroelectric latch as in claim 1 further comprising means for selectively powering the sense amplifier.
Claim 6
Dependent Claim
120 words
The non-volatile ferroelectric latch comprising: a sense amplifier having first and second input/outputs coupled respectively coupled to first and second internal bit-line nodes; a first ferroelectric capacitor coupled between a first plate-line node and the first internal bit-line node; a second ferroelectric capacitor coupled between a second plate-line node and the second internal bit-line node; a first load element coupled between the first internal bit-line node and ground; a second load element coupled between the second internal bit-line node and ground; control circuitry coupled to the first and second plate-line nodes and to the first and second internal bit-line nodes; and isolation circuitry coupled between the first and second internal bit-line nodes and the first and second external bit-line nodes.
Claim 7
Dependent Claim
120 words
The non-volatile ferroelectric latch comprising: a sense amplifier having first and second input/outputs coupled respectively coupled to first and second internal bit-line nodes; a first ferroelectric capacitor coupled between a first plate-line node and the first internal bit-line node; a second ferroelectric capacitor coupled between a second plate-line node and the second internal bit-line node; a first load element coupled between the first internal bit-line node and ground; a second load element coupled between the second internal bit-line node and ground; control circuitry coupled to the first and second plate-line nodes and to the first and second internal bit-line nodes; and isolation circuitry coupled between the first and second internal bit-line nodes and the first and second external bit-line nodes.
Claim 8
Dependent Claim
25 words
The non-volatile ferroelectric latch as in claim 5 in which the first and second load elements each comprise a ferroelectric capacitor or a linear capacitor.
Claim 9
Dependent Claim
97 words
The non-volatile ferroelectric latch as in claim 5 in which the control circuitry comprises: a first controlled transistor having a current path coupled between a source of supply voltage and the first plate-line node; a second controlled transistor having a current path coupled between the source of supply voltage and the second plate-line node; a first controlled transmission gate having a current path coupled between the first plate-line node and the second internal bit-line node; and a second controlled transmission gate having a current path coupled between the second plate-line node and the first internal bit-line node.
Claim 10
Dependent Claim
101 words
The non-volatile ferroelectric latch as in claim 5 in which the control circuitry comprises: a first inverter having a current path, an input coupled to the first internal bit-line node, and an output coupled to the first plate-line node; a second inverter having a current path, an input coupled to the second internal bit-line node, and an output coupled to the second plate-line node; a first controlled transistor having a current path in series with the current path of the first inverter; and a second controlled transistor having a current path in series with the current path of the second inverter.
Claim 11
Dependent Claim
34 words
The non-volatile ferroelectric latch as in claim 8 in which the first and second controlled transistors are controlled by a control signal applied to a gate of each of the first and second transistors.
Claim 12
Dependent Claim
40 words
The non-volatile ferroelectric latch as in claim 8 in which the first and second controlled transistors are controlled by a signal on the first and second internal bit-line nodes respectively applied to the gates of the first and second transistors.
Claim 13
Dependent Claim
75 words
The non-volatile ferroelectric latch as in claim 5 in which the isolation circuitry comprises: a first transistor having a gate and a current path coupled between first internal bit-line node and the first external bit-line node; and a second transistor having a gate and a current path coupled between the second internal bit-line node and the second external bit-line node, wherein the gates of the first and second transistors are coupled to a word-line node.
Claim 14
Dependent Claim
106 words
The non-volatile ferroelectric latch comprising: a sense amplifier having first and second input/outputs respectively coupled to first and second internal bit-line nodes; a first ferroelectric capacitor coupled between a first plate-line node and the first internal bit-line node; a second ferroelectric capacitor coupled between the first plate-line node and the second internal bit-line node; a first load element coupled between the first internal bit-line node and a second plate-line node; a second load element coupled between the second internal bit-line node and the second plate-line node; and isolation circuitry coupled between the first and second internal bit-line nodes and the first and second external bit-line nodes.
Claim 15
Dependent Claim
106 words
The non-volatile ferroelectric latch comprising: a sense amplifier having first and second input/outputs respectively coupled to first and second internal bit-line nodes; a first ferroelectric capacitor coupled between a first plate-line node and the first internal bit-line node; a second ferroelectric capacitor coupled between the first plate-line node and the second internal bit-line node; a first load element coupled between the first internal bit-line node and a second plate-line node; a second load element coupled between the second internal bit-line node and the second plate-line node; and isolation circuitry coupled between the first and second internal bit-line nodes and the first and second external bit-line nodes.
Claim 16
Dependent Claim
25 words
The non-volatile ferroelectric latch as in claim 12 in which the first and second load elements each comprise a ferroelectric capacitor or a linear capacitor.
Claim 17
Dependent Claim
75 words
The non-volatile ferroelectric latch as in claim 12 in which the isolation circuitry comprises: a first transistor having a gate and a current path coupled between first internal bit-line node and the first external bit-line node; and a second transistor having a gate and a current path coupled between the second internal bit-line node and the second external bit-line node, wherein the gates of the first and second transistors are coupled to a word-line node.
Claim 18
Dependent Claim
17 words
The non-volatile ferroelectric latch as in claim 12 further comprising means for selectively powering the sense amplifier.
Claim 19
Dependent Claim
119 words
The non-volatile ferroelectric latch comprising: a first controlled sense amplifier having first and second input/outputs respectively coupled to first and second internal bit-line nodes; a second controlled sense amplifier having first and second input/outputs respectively coupled to first and second plate-line nodes; a first ferroeiectric capacitor coupled between the first plate-line node and the first internal bit-line node; a second ferroelectric capacitor coupled between the second plate-line node and the second internal bit-line node; a first load element coupled between the first internal bit-line node and ground; a second load element coupled between the second internal bit-line node and ground; and isolation circuitry coupled between the first and second internal bit-line nodes and first and second external bit-line nodes.
Claim 20
Dependent Claim
119 words
The non-volatile ferroelectric latch comprising: a first controlled sense amplifier having first and second input/outputs respectively coupled to first and second internal bit-line nodes; a second controlled sense amplifier having first and second input/outputs respectively coupled to first and second plate-line nodes; a first ferroeiectric capacitor coupled between the first plate-line node and the first internal bit-line node; a second ferroelectric capacitor coupled between the second plate-line node and the second internal bit-line node; a first load element coupled between the first internal bit-line node and ground; a second load element coupled between the second internal bit-line node and ground; and isolation circuitry coupled between the first and second internal bit-line nodes and first and second external bit-line nodes.
Claim 21
Dependent Claim
28 words
The non-volatile ferroelectric latch as in claim 16 in which the first and second load elements each comprise a ferroelectric capacitor, a linear capacitor, or a resistive load.
Claim 22
Dependent Claim
75 words
The non-volatile ferroelectric latch as in claim 16 in which the isolation circuitry comprises: a first transistor having a gate and a current path coupled between first internal bit-line node and the first external bit-line node; and a second transistor having a gate and a current path coupled between the second internal bit-line node and the second external bit-line node, wherein the gates of the first and second transistors are coupled to a word-line node.
Claim 23
Dependent Claim
17 words
The non-volatile ferroelectric latch as in claim 16 further comprising means for selectively powering the sense amplifiers.
Claim 24
Dependent Claim
85 words
The non-volatile ferroelectric latch as in claim 19 in which the means for selectively powering the sense amplifiers comprises: a first control signal for driving a positive power terminal of the first sense amplifier; a second control signal for driving a positive power terminal of the second sense amplifier; and a transistor having a drain coupled to a negative power terminal of the first sense amplifier and a negative power terminal of the second sense amplifier, and a gate for receiving the first control signal.
Claim 25
Dependent Claim
40 words
A non-volatile ferroelectric latch comprising: a sense amplifier having at least one input/output coupled to a bit-line node; a ferroelectric storage capacitor coupled between a plate-line node and the bit-line node; and a load element coupled to the bit-line node.
Claim 26
Dependent Claim
40 words
A non-volatile ferroelectric latch comprising: a sense amplifier having at least one input/output coupled to a bit-line node; a ferroelectric storage capacitor coupled between a plate-line node and the bit-line node; and a load element coupled to the bit-line node.
Claim 27
Dependent Claim
56 words
The non-volatile ferroelectric latch as in claim 21 in which the sense amplifier further includes a second input/output coupled to a second bit-line node and the latch further comprises: a second ferroelectric storage capacitor coupled between a second plate-line node and the second bit-line node; and a second load element coupled to the second bit-line node.
Claim 28
Dependent Claim
19 words
The non-volatile ferroelectric latch as in claim 21 in which the load element comprises a dynamic, switched ferroelectric capacitor.
Claim 29
Dependent Claim
19 words
The non-volatile ferroelectric latch as in claim 21 in which the load element comprises a static, nonswitched ferroelectric capacitor.
Claim 30
Dependent Claim
17 words
The non-volatile ferroelectric latch as in claim 21 in which the load element comprises a linear capacitor.
Claim 31
Dependent Claim
17 words
The non-volatile ferroelectric latch as in claim 21 in which the load element comprises a resistive load.
Claim 32
Dependent Claim
73 words
The non-volatile ferroelectric latch comprising: a pair of isolated plate lines; a sense amplifier having a pair of input/output nodes respectively coupled to the pair of plate lines; a pair of ferroelectric capacitors respectively coupled between the plate lines and a pair of bit line nodes; a load element pair coupled to the pair of bit line nodes; and circuitry for providing a complementary data state to the pair of bit line nodes.
Claim 33
Dependent Claim
73 words
The non-volatile ferroelectric latch comprising: a pair of isolated plate lines; a sense amplifier having a pair of input/output nodes respectively coupled to the pair of plate lines; a pair of ferroelectric capacitors respectively coupled between the plate lines and a pair of bit line nodes; a load element pair coupled to the pair of bit line nodes; and circuitry for providing a complementary data state to the pair of bit line nodes.
Claim 34
Dependent Claim
29 words
The non-volatile latch as in claim 27 in which the load element comprises a pair of ferroelectric capacitors, a pair of linear capacitors, or a pair of resistive elements.
Claim 35
Dependent Claim
41 words
The non-volatile latch as in claim 27 in which the circuitry for providing a complementary data state comprises a circuit having a pair of inputs coupled to the plate lines and a pair of outputs coupled to the bit line nodes.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-10-31 | 2004-05-01 | 2004-10-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-10-31 | 2008-05-01 | 2008-10-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-10-31 | 2012-05-01 | 2012-10-31 | $7700.00 | Window Closed / Lapsed |