US5901088A
Expired / Lapsed
US
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Sense amplifier utilizing a balancing resistor
Assignee: Ramtron International Corp
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Filing: 1998-02-11
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Granted: 1999-05-04
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Expires: 2018-02-11
Abstract
Abstract A cross-coupled sense amplifier includes a voltage-compensating balancing resistor serially connected between the drain of one of the P-channel transistors in the sense amplifier and the corresponding sensing/bit line node. The value of the balancing resistor is optimized so that the voltage imbalance between the P-channel transistor is minimized and sense amplifier sensitivity is maximized. A balancing resistor can also be placed in the N-channel transistors in the sense amplifier if desired. The balancing resistor in a typical application is about 100 to 200 ohms and fabricated from polysilicon.
Inventors
- 👤 William F. Kraus
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 09:09
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/06; G11C7/065
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
59 words
A sense amplifier comprising: a pair of cross-coupled transistors coupled between a power node and first and second bit nodes; and a balancing resistor coupled in series between one of the bit nodes and the corresponding transistor, the balancing resistor having a resistance value that is optimized such that the voltage offset between the sense amplifier transistors is minimized.
Claim 2
Dependent Claim
59 words
A sense amplifier comprising: a pair of cross-coupled transistors coupled between a power node and first and second bit nodes; and a balancing resistor coupled in series between one of the bit nodes and the corresponding transistor, the balancing resistor having a resistance value that is optimized such that the voltage offset between the sense amplifier transistors is minimized.
Claim 3
Dependent Claim
22 words
A sense amplifier as in claim 1 in which the balancing resistor has a resistance value between about 100 and 200 ohms.
Claim 4
Dependent Claim
14 words
A sense amplifier as in claim 1 in which the balancing resistor comprises polysilicon.
Claim 5
Dependent Claim
133 words
A sense amplifier for coupling to an unbalanced column of memory cells comprising: first and second P-channel transistors each having a source, drain, and a gate, the sources of the first and second P-channel transistors being coupled to a power node, the gate of the first P-channel transistor being coupled to the drain of the second P-channel transistor to form a first bit node, and the gate of the second P-channel transistor being coupled to the drain of the first P-channel transistor to form a second bit node; and a balancing resistor coupled in series between the drain of one of the P-channel transistors and the corresponding bit node, the balancing resistor having a resistance value that is optimized such that the voltage offset between the first and second P-channel transistors is minimized.
Claim 6
Dependent Claim
133 words
A sense amplifier for coupling to an unbalanced column of memory cells comprising: first and second P-channel transistors each having a source, drain, and a gate, the sources of the first and second P-channel transistors being coupled to a power node, the gate of the first P-channel transistor being coupled to the drain of the second P-channel transistor to form a first bit node, and the gate of the second P-channel transistor being coupled to the drain of the first P-channel transistor to form a second bit node; and a balancing resistor coupled in series between the drain of one of the P-channel transistors and the corresponding bit node, the balancing resistor having a resistance value that is optimized such that the voltage offset between the first and second P-channel transistors is minimized.
Claim 7
Dependent Claim
22 words
A sense amplifier as in claim 4 in which the balancing resistor has a resistance value between about 100 and 200 ohms.
Claim 8
Dependent Claim
14 words
A sense amplifier as in claim 4 in which the balancing resistor comprises polysilicon.
Claim 9
Dependent Claim
84 words
A sense amplifier as in claim 4 further comprising first and second N-channel transistors each having a source, drain, and a gate, the sources of the first and second N-channel transistors being coupled to a ground node, the gate of the first N-channel transistor being coupled to the drain of the second N-channel transistor and to the first bit node, and the gate of the second P-channel transistor being coupled to the drain of the first N-channel transistor and to the second bit node.
Claim 10
Dependent Claim
53 words
A sense amplifier as in claim 7 further comprising a balancing resistor coupled in series between the drain of one of the N-channel transistors and the corresponding bit node, the balancing resistor having a resistance value that is optimized such that the voltage offset between the first and second N-channel transistors is minimized.
Claim 11
Dependent Claim
22 words
A sense amplifier as in claim 8 in which the balancing resistor has a resistance value between about 100 and 200 ohms.
Claim 12
Dependent Claim
14 words
A sense amplifier as in claim 8 in which the balancing resistor comprises polysilicon.
Claim 13
Independent Claim
58 words
A method for balancing a sense amplifier including at least a pair of cross-coupled transistors having a power or ground node and first and second bit nodes, the method comprising: inserting a balancing resistor between one of the transistors and the associated bit node; optimizing the resistor value so that the voltage offset between the transistors is minimized.
Claim 14
Independent Claim
58 words
A method for balancing a sense amplifier including at least a pair of cross-coupled transistors having a power or ground node and first and second bit nodes, the method comprising: inserting a balancing resistor between one of the transistors and the associated bit node; optimizing the resistor value so that the voltage offset between the transistors is minimized.
Claim 15
Independent Claim
88 words
A method of balancing a sense amplifier including at least a pair of cross-coupled transistors having a power or ground node and first and second bit nodes coupled to an unbalanced column of memory cells, the method comprising: determining the parasitic resistance and current load associated with each bit node; inserting a balancing resistor between one of the transistors and the bit node determined to have the lesser of the two bit node resistances; setting the resistor value so that the voltage offset between the transistors is minimized.
Claim 16
Independent Claim
88 words
A method of balancing a sense amplifier including at least a pair of cross-coupled transistors having a power or ground node and first and second bit nodes coupled to an unbalanced column of memory cells, the method comprising: determining the parasitic resistance and current load associated with each bit node; inserting a balancing resistor between one of the transistors and the bit node determined to have the lesser of the two bit node resistances; setting the resistor value so that the voltage offset between the transistors is minimized.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-05-03 | 2002-11-02 | 2003-05-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-05-03 | 2006-11-02 | 2007-05-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-05-03 | 2010-11-02 | 2011-05-04 | $7700.00 | Window Closed / Lapsed |