Abstract On a p ++ substrate (1) provided is a p - epitaxial layer (2) having an impurity concentration lower than that of the p ++ substrate (1). A p well (3) is formed in a portion of the p - epitaxial layer 2 and further n + diffusion layers (4a and 4b) are selectively formed in the p well (3). A memory cell capacitor (5) is connected onto the n + diffusion layer 4b. On the other hand, an no diffusion layer (6) is selectively formed in the p - epitaxial layer (2) separately from the p well (3), to which an external signal input circuit (7) is connected. Further, a p ++ diffusion layer 9a is provided between the external signal input circuit (7) serving as a source for injection of the minority carriers, i.e., electrons and the n + diffusion layer (4b) connected to the memory cell capacitor (5), for blocking the entry of the minority carries. The p ++ diffusion layer (9a) extends up to such a depth as to reach the p ++ substrate (1) from a surface of the p - epitaxial layer (2). Having this structure, a semiconductor device which does not allow the electrons injected to the p - epitaxial layer from the external signal input circuit to reach the memory cell capacitor can be provided.
A semiconductor device, comprising: a semiconductor thin film of a first conductivity type provided on a semiconductor substrate of said first conductivity type; a first impurity diffusion layer of said first conductivity type provided in a form of layer in said semiconductor thin film; a second impurity diffusion layer of said first conductivity type provided in a form of layer at a depth shallower than a depth at which said first impurity diffusion layer is provided in said semiconductor thin film; and a minority-carrier source for generating minority carriers of a second conductivity type opposite to said first conductivity type and an impurity diffusion region of said first conductivity type each selectively provided in said semiconductor thin film, wherein each of impurity concentrations of said impurity diffusion region and said first and second impurity diffusion layers is higher than that of said semiconductor thin film, and said impurity diffusion region extends up to such a depth as to reach said first impurity diffusion layer from a surface of said semiconductor thin film.
Claim 2
Dependent Claim
172 words
A semiconductor device, comprising: a semiconductor thin film of a first conductivity type provided on a semiconductor substrate of said first conductivity type; a first impurity diffusion layer of said first conductivity type provided in a form of layer in said semiconductor thin film; a second impurity diffusion layer of said first conductivity type provided in a form of layer at a depth shallower than a depth at which said first impurity diffusion layer is provided in said semiconductor thin film; and a minority-carrier source for generating minority carriers of a second conductivity type opposite to said first conductivity type and an impurity diffusion region of said first conductivity type each selectively provided in said semiconductor thin film, wherein each of impurity concentrations of said impurity diffusion region and said first and second impurity diffusion layers is higher than that of said semiconductor thin film, and said impurity diffusion region extends up to such a depth as to reach said first impurity diffusion layer from a surface of said semiconductor thin film.
Claim 3
Dependent Claim
20 words
The semiconductor device of claim 1, wherein said impurity diffusion region is provided so as to surround said minority-carrier source.
Claim 4
Dependent Claim
23 words
The semiconductor device of claim 1, wherein said semiconductor substrate, said impurity diffusion region and said semiconductor thin film each have p-type conductivity.
Claim 5
Dependent Claim
23 words
The semiconductor device of claim 1, wherein said semiconductor substrate, said impurity diffusion region and said semiconductor thin film each have n-type conductivity.