US6060358A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Damascene NVRAM cell and method of manufacture
Assignee: International Business Machines Corp
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Filing: 1997-10-21
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Granted: 2000-05-09
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Expires: 2017-10-21
Abstract
Abstract Recessing the floating gate of a NVRAM cell within a substrate or semiconductor layer between isolation structures permits manufacture by a simplified self-aligned process of high yield and economy while supporting maximum integration density and reducing or eliminating severe topography of the control gate connections which are formed in strips having a generally planar lower surface and which are of improved robustness and potentially fine pitch. Impurity implants are facilitated by thicknesses of various material present during portions of the process and in various combinations which may be advantageously exploited to obtain tailoring of impurity concentrations and profiles of both NVRAM cells and damascene field effect transistors formed by similar and compatible processes.
Inventors
- 👤 John A. Bracchitta
- 👤 Jeffrey B. Johnson
- 👤 Glen L. Miles
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 19:24
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D64/00; H10D64/01; H10D64/031; H10D64/035
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
145 words
A method of making a semiconductor device including the steps of: forming a trench in a semiconductor substrate through an aperture in a layer of material formed on said semiconductor substrate, forming an insulator layer on a surface of said semiconductor substrate within said trench, filling said trench and said aperture with semiconductor material such that said semiconductor material protrudes above a surface of said semiconductor substrate, planarizing said semiconductor material, said trench filling and planarizing steps being performed in accordance with a damascene process, implanting material in said semiconductor substrate self-aligned with said semiconductor material protruding above a surface of said semiconductor substrate; removing a portion of said semiconductor material in said trench; depositing a further insulating layer in said trench over a remaining portion of said semiconductor material; and filling a remaining portion of said trench and said aperture with further semiconductor material.
Claim 2
Independent Claim
145 words
A method of making a semiconductor device including the steps of: forming a trench in a semiconductor substrate through an aperture in a layer of material formed on said semiconductor substrate, forming an insulator layer on a surface of said semiconductor substrate within said trench, filling said trench and said aperture with semiconductor material such that said semiconductor material protrudes above a surface of said semiconductor substrate, planarizing said semiconductor material, said trench filling and planarizing steps being performed in accordance with a damascene process, implanting material in said semiconductor substrate self-aligned with said semiconductor material protruding above a surface of said semiconductor substrate; removing a portion of said semiconductor material in said trench; depositing a further insulating layer in said trench over a remaining portion of said semiconductor material; and filling a remaining portion of said trench and said aperture with further semiconductor material.
Claim 3
Dependent Claim
26 words
A method as recited in claim 1, including the further step of implanting material into said semiconductor substrate prior to said step of filling said trench.
Claim 4
Dependent Claim
23 words
A method as recited in claim 1, including the further step of forming an isolation structure in a surface of said semiconductor substrate.
Claim 5
Dependent Claim
28 words
A method as recited in claim 1, including the further step of forming a nitride layer comprising said material on said surface of said semiconductor layer or substrate.
Claim 6
Dependent Claim
29 words
A method as recited in claim 4, including the further step of forming a further nitride layer comprising said layer of material on a surface of said nitride layer.
Claim 7
Dependent Claim
26 words
A method as recited in claim 5, including the further step of forming an oxide layer comprising said layer of material on said further nitride layer.
Claim 8
Dependent Claim
21 words
A method as recited in claim 1, including the further step of planarizing said semiconductor material to said layer of material.
Claim 9
Dependent Claim
23 words
A method as recited in claim 4, including the further step of planarizing an isolation structure to a surface of said nitride layer.
Claim 10
Dependent Claim
20 words
A method as recited in claim 6, including the further step of planarizing said semiconductor material to said oxide layer.
Claim 11
Dependent Claim
20 words
A method as recited in claim 5, including the further step of planarizing semiconductor material to said further nitride layer.
Claim 12
Dependent Claim
16 words
A method as recited in claim 1, wherein said trench is located between said implanted material.
Claim 13
Dependent Claim
20 words
A method as recited in claim 11, wherein said material filling said trench forms a gate structure of the transistor.
Claim 14
Dependent Claim
32 words
A method as recited in claim 1, wherein said implanting step includes a step of implanting said material in said semiconductor substrate through said layer of material formed on said semiconductor substrate.
Claim 15
Dependent Claim
27 words
A method as recited in claim 13, wherein said implanting step includes implanting said material in said substrate at a location adjacent to sidewalls of said trench.
Claim 16
Dependent Claim
17 words
A method as recited in claim 1, wherein said implanting step is performed after said filling step.
Claim 17
Dependent Claim
42 words
A method as recited in claim 1, wherein said insulating layer has respective ends which contact sidewalls of said trench, so as to isolate said semiconductor material within said insulating layer, the sidewalls of said trench, and a bottom of said trench.
Claim 18
Dependent Claim
34 words
A method as recited in claim 1, further comprising: forming an isolation structure adjacent said trench, and wherein said implanting step includes implanting said material so as to be selfaligned with said isolation structure.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-05-09 | 2003-11-08 | 2004-05-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-05-09 | 2007-11-08 | 2008-05-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-05-09 | 2011-11-08 | 2012-05-09 | $7700.00 | Window Closed / Lapsed |