US6048756A
Expired / Lapsed
US
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Method for making a silicon-on-insulator MOS transistor using a selective SiGe epitaxy
Assignee: Electronics and Telecommunications Research Institute
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Filing: 1998-06-25
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Granted: 2000-04-11
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Expires: 2018-06-25
Abstract
Abstract Disclosed is a method for manufacturing a metal-oxide-semiconductor (MOS) device formed in an epitaxial silicon layer on insulator substrate comprising the steps of forming a field oxide layer defined an active region of the MOS device in the silicon layer and forming a gate oxide on the silicon layer; forming a gate electrode on the gate oxide, and self-aligned implanting a dopant of low concentration to form a lightly doped drain region; forming an oxide spacer in both sides of the gate electrode; growing a SiGe epitaxial layer having a lower bandgap than the silicon layer on the portion of the exposed silicon layer; and implanting a dopant of high concentration over the SiGe epitaxial layer to form a highly doped source/drain region. This invention can easily manufacture an SOI MOS device having a low source/drain series resistance and a high breakdown voltage without additional complex processes.
Inventors
- 👤 Jong Ho Lee
- 👤 Jong Son Lyu
- 👤 Bo Woo Kim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 01:30
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10P; H10P10/00; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6729; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6744; H10D62/00; H10D62/01; H10D62/021; H10P14/00; H10P14/20; H10P14/27; H10P14/271; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
153 words
A method for manufacturing a metal-oxide-semiconductor (MOS) device formed in an epitaxial silicon layer on insulator substrate comprising the steps of: a) forming a field oxide layer defined an active region of the MOS device in the silicon layer and forming a gate oxide on the silicon layer; b) forming a gate electrode on the gate oxide, and self-aligned implanting a dopant of low concentration to form a lightly doped drain region; c) forming an oxide spacer in both sides of the gate electrode; d) growing a SiGe epitaxial layer having a lower bandgap than the silicon layer only on the portion of the exposed silicon layer by a selective epitaxial growing method; e) implanting a dopant of high concentration over the SiGe epitaxial layer to form a highly doped source/drain region; f) depositing an interlayer dielectric film and forming openings in the interlayer dielectric film; and g) forming contacts in said openings.
Claim 2
Independent Claim
153 words
A method for manufacturing a metal-oxide-semiconductor (MOS) device formed in an epitaxial silicon layer on insulator substrate comprising the steps of: a) forming a field oxide layer defined an active region of the MOS device in the silicon layer and forming a gate oxide on the silicon layer; b) forming a gate electrode on the gate oxide, and self-aligned implanting a dopant of low concentration to form a lightly doped drain region; c) forming an oxide spacer in both sides of the gate electrode; d) growing a SiGe epitaxial layer having a lower bandgap than the silicon layer only on the portion of the exposed silicon layer by a selective epitaxial growing method; e) implanting a dopant of high concentration over the SiGe epitaxial layer to form a highly doped source/drain region; f) depositing an interlayer dielectric film and forming openings in the interlayer dielectric film; and g) forming contacts in said openings.
Claim 3
Dependent Claim
21 words
The method as claimed in claim 1, wherein a polysilicon layer including germanium is used instead of said SiGe epitaxial layer.
Claim 4
Dependent Claim
24 words
The method as claimed in claim 1, further comprising the step of thinning the exposed silicon layer by etching after the step of (c).
Claim 5
Dependent Claim
30 words
The method of as claimed in claim 3, wherein the thickness of said remained silicon layer is thinner than that of the silicon body contact region underlying the gate oxide.
Claim 6
Dependent Claim
25 words
The method of as claimed in claim 1, wherein the mole fraction of germanium in said SiGe epitaxial layer is in the range of 1-80%.
Claim 7
Dependent Claim
54 words
The method of as claimed in claim 1, wherein the step of (c) including the steps of depositing an oxide film and etching over the oxide film to expose the silicon layer and to form the oxide spacer, carried out at least two times for the purpose of controlling the thickness of the spacer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-04-11 | 2003-10-11 | 2004-04-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-04-11 | 2007-10-11 | 2008-04-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-04-11 | 2011-10-11 | 2012-04-11 | $7700.00 | Window Closed / Lapsed |