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US6037205A
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Method of forming capacitor for semiconductor device using N2 O gas
Assignee: SK Hynix Inc
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Filing: 1997-04-18
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Granted: 2000-03-14
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Expires: 2017-04-18
Abstract
Abstract A method of forming a capacitor for a semiconductor device includes the steps of forming a gate electrode on a semiconductor substrate, forming an impurity diffused region on portions of the semiconductor substrate at sides of the gate electrode, forming a storage node electrode layer contacting one side of the impurity diffused region, forming a thermal nitride film on the storage node electrode layer, forming a Ta 2 O 5 layer on the thermal nitride film, and annealing the Ta 2 O 5 layer using an N 2 O gas.
Inventors
- 👤 Yun Jun Huh
- 👤 Sang Hyun Kim
- 👤 Je Uk Oh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 09:30
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/716; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0144; H10D1/682; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/65; H10P14/6516; H10P14/6518; H10P14/6519; H10P14/6522; H10P14/6529; H10P14/69; H10P14/692; H10P14/6938; H10P14/6939; H10P14/69393
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
153 words
A method of forming a capacitor for a semiconductor device on a semiconductor substrate, the method comprising the steps of: forming an oxidized nitride layer on the semiconductor substrate, wherein the oxidized nitride layer includes a first layer and a second layer on the first layer, the second layer having a nitrogen concentration higher than the first layer; forming a first Ta 2 O 5 layer on the oxidized nitride layer: forming a gate electrode on the first Ta 2 O 5 layer; forming an impurity diffused region on portions of the semiconductor substrate at sides of the gate electrode; forming a storage node electrode layer contacting one side of the impurity diffused region; forming a thermal nitride film on the storage node electrode layer; forming a second Ta 2 O 5 layer on the thermal nitride film; and annealing the second Ta 2 O 5 layer using an N 2 O gas.
Claim 2
Independent Claim
153 words
A method of forming a capacitor for a semiconductor device on a semiconductor substrate, the method comprising the steps of: forming an oxidized nitride layer on the semiconductor substrate, wherein the oxidized nitride layer includes a first layer and a second layer on the first layer, the second layer having a nitrogen concentration higher than the first layer; forming a first Ta 2 O 5 layer on the oxidized nitride layer: forming a gate electrode on the first Ta 2 O 5 layer; forming an impurity diffused region on portions of the semiconductor substrate at sides of the gate electrode; forming a storage node electrode layer contacting one side of the impurity diffused region; forming a thermal nitride film on the storage node electrode layer; forming a second Ta 2 O 5 layer on the thermal nitride film; and annealing the second Ta 2 O 5 layer using an N 2 O gas.
Claim 3
Dependent Claim
21 words
The method according to claim 1, wherein the second Ta 2 O 5 layer is formed by chemical vapor deposition (CVD).
Claim 4
Dependent Claim
27 words
The method according to claim 1, wherein the step of annealing the second Ta 2 O 5 layer is performed at a pressure of about 1-100 Torr.
Claim 5
Dependent Claim
31 words
The method according to claim 3, wherein the step of annealing the second Ta 2 O 5 layer is performed at a temperature of about 800-900° C. for about 60 seconds.
Claim 6
Independent Claim
187 words
A method of forming a capacitor for a semiconductor device on a semiconductor substrate, the method comprising the steps of: forming an oxidized nitride layer on the semiconductor substrate, wherein the oxidized nitride layer includes a first layer and a second layer on the first layer, the second layer having a nitrogen concentration higher than the first layer; forming a first Ta 2 O 5 layer on the oxidized nitride layer: forming a gate electrode on the first Ta 2 O 5 layer; forming a field oxide film on a first portion of the semiconductor substrate; forming impurity diffused regions on portions other than the first portion of the semiconductor substrate at sides of the gate electrode; forming an insulation film having a hole over one of the impurity diffused regions; forming a storage node electrode layer contacting the one of the impurity diffused regions through the hole; forming a thermal nitride film on the storage node electrode layer; forming a second Ta 2 O 5 layer on the thermal nitride film; and annealing the second Ta 2 O 5 layer using an N 2 O gas.
Claim 7
Independent Claim
187 words
A method of forming a capacitor for a semiconductor device on a semiconductor substrate, the method comprising the steps of: forming an oxidized nitride layer on the semiconductor substrate, wherein the oxidized nitride layer includes a first layer and a second layer on the first layer, the second layer having a nitrogen concentration higher than the first layer; forming a first Ta 2 O 5 layer on the oxidized nitride layer: forming a gate electrode on the first Ta 2 O 5 layer; forming a field oxide film on a first portion of the semiconductor substrate; forming impurity diffused regions on portions other than the first portion of the semiconductor substrate at sides of the gate electrode; forming an insulation film having a hole over one of the impurity diffused regions; forming a storage node electrode layer contacting the one of the impurity diffused regions through the hole; forming a thermal nitride film on the storage node electrode layer; forming a second Ta 2 O 5 layer on the thermal nitride film; and annealing the second Ta 2 O 5 layer using an N 2 O gas.
Claim 8
Dependent Claim
21 words
The method according to claim 5, wherein the second Ta 2 O 5 layer is formed by chemical vapor deposition (CVD).
Claim 9
Dependent Claim
27 words
The method according to claim 5, wherein the step of annealing the second Ta 2 O 5 layer is performed at a pressure of about 1-100 Torr.
Claim 10
Dependent Claim
31 words
The method according to claim 7, wherein the step of annealing the second Ta 2 O 5 layer is performed at a temperature of about 800-900 C. for about 60 seconds.
Claim 11
Independent Claim
167 words
A method of forming a capacitor for a semiconductor device on a semiconductor substrate, the method comprising the steps of: forming an oxidized nitride layer on the semiconductor substrate, wherein the oxidized nitride layer includes a first layer and a second layer on the first layer, the second layer having a nitrogen concentration higher than the first layer; forming a first Ta 2 O 5 layer on the oxidized nitride layer: forming a gate electrode on the first Ta 2 O 5 layer; forming an impurity diffused region on portions of the semiconductor substrate at sides of the gate electrode; forming first, second, third insulating layers on the gate electrode including the semiconductor substrate; forming a storage node electrode layer contacting one side of the impurity diffused region; forming a thermal nitride film on the storage node electrode layer; forming a second Ta 2 O 5 layer on the thermal nitride film; and annealing the second Ta 2 O 5 layer using an N 2 O gas.
Claim 12
Independent Claim
167 words
A method of forming a capacitor for a semiconductor device on a semiconductor substrate, the method comprising the steps of: forming an oxidized nitride layer on the semiconductor substrate, wherein the oxidized nitride layer includes a first layer and a second layer on the first layer, the second layer having a nitrogen concentration higher than the first layer; forming a first Ta 2 O 5 layer on the oxidized nitride layer: forming a gate electrode on the first Ta 2 O 5 layer; forming an impurity diffused region on portions of the semiconductor substrate at sides of the gate electrode; forming first, second, third insulating layers on the gate electrode including the semiconductor substrate; forming a storage node electrode layer contacting one side of the impurity diffused region; forming a thermal nitride film on the storage node electrode layer; forming a second Ta 2 O 5 layer on the thermal nitride film; and annealing the second Ta 2 O 5 layer using an N 2 O gas.
Claim 13
Dependent Claim
21 words
The method according to claim 9, wherein the second Ta 2 O 5 layer is formed by chemical vapor deposition (CVD).
Claim 14
Dependent Claim
27 words
The method according to claim 9, wherein the step of annealing the second Ta 2 O 5 layer is performed at a pressure of about 1-100 Torr.
Claim 15
Dependent Claim
31 words
The method according to claim 11, wherein the step of annealing the second Ta 2 O 5 layer is performed at a temperature of about 800-900° C. for about 60 seconds.
Claim 16
Independent Claim
206 words
A method of forming a capacitor for a semiconductor device on a semiconductor substrate, the method comprising the steps of: forming an oxidized nitride layer on the semiconductor substrate, wherein the oxidized nitride layer includes a first layer and a second layer on the first layer, the second layer having a nitrogen concentration higher than the first layer; forming a first Ta 2 O 5 layer on the oxidized nitride layer, forming a gate electrode on the first Ta 2 O 5 layer; forming a field oxide film on a first portion of the semiconductor substrate; forming impurity diffused regions on portions other than the first portion of the semiconductor substrate at sides of the gate electrode; forming first, second, third insulating films on the gate electrode and the field oxide film including the semiconductor substrate; the first, second, third insulating layers having a hole over the impurity diffused regions; forming a storage node electrode layer contacting the one of the impurity diffused regions through the hole; forming a thermal nitride film on the storage node electrode layer; forming a second Ta 2 O 5 layer on the thermal nitride film; and annealing the second Ta 2 O 5 layer using an N 2 O gas.
Claim 17
Independent Claim
206 words
A method of forming a capacitor for a semiconductor device on a semiconductor substrate, the method comprising the steps of: forming an oxidized nitride layer on the semiconductor substrate, wherein the oxidized nitride layer includes a first layer and a second layer on the first layer, the second layer having a nitrogen concentration higher than the first layer; forming a first Ta 2 O 5 layer on the oxidized nitride layer, forming a gate electrode on the first Ta 2 O 5 layer; forming a field oxide film on a first portion of the semiconductor substrate; forming impurity diffused regions on portions other than the first portion of the semiconductor substrate at sides of the gate electrode; forming first, second, third insulating films on the gate electrode and the field oxide film including the semiconductor substrate; the first, second, third insulating layers having a hole over the impurity diffused regions; forming a storage node electrode layer contacting the one of the impurity diffused regions through the hole; forming a thermal nitride film on the storage node electrode layer; forming a second Ta 2 O 5 layer on the thermal nitride film; and annealing the second Ta 2 O 5 layer using an N 2 O gas.
Claim 18
Dependent Claim
21 words
The method according to claim 13, wherein the second Ta 2 O 5 layer is formed by chemical vapor deposition (CVD).
Claim 19
Dependent Claim
27 words
The method according to claim 13, wherein the step of annealing the second Ta 2 O 5 layer is performed at a pressure of about 1-100 Torr.
Claim 20
Dependent Claim
31 words
The method according to claim 15, wherein the step of annealing the second Ta 2 O 5 layer is performed at a temperature of about 800-900° C. for about 60 seconds.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-03-14 | 2003-09-13 | 2004-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-03-14 | 2007-09-13 | 2008-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-03-14 | 2011-09-13 | 2012-03-14 | $7700.00 | Window Closed / Lapsed |