Semiconductor diode with external field modulation

Claim 2

A semiconductor apparatus comprising: (a) a semiconductor substrate of a first conductivity type, the substrate having a device surface; (b) a patterned insulating layer formed on the device surface having at least one region of access to the semiconductor substrate; (c) a patterned electrically conductive material in contact with the semiconductor substrate in an access region, the electrically conductive material in combination with the semiconductor substrate forming a rectifying junction with a conduction characteristic; (d) a pair of electrodes connected to opposite sides of the rectifying junction, with a first electrode being connected to the semiconductor substrate and a second electrode being connected to the patterned electrically conductive material; and (e) at least one electric field generating layer deposited over the patterned conductive material in the vicinity of the rectifying junction, the at least one electric field generating layer having a third electrode connected thereto.

Claim 3

The semiconductor apparatus in claim 1 in which the at least one electric field generating layer is formed from a ferroelectric material.

Claim 4

The semiconductor apparatus in claim 2 in which the ferroelectric material has at least one polarization state with an electric field component that alters the conduction characteristic of the rectifying junction.

Claim 5

The semiconductor apparatus in claim 3 in which the ferroelectric material is chosen from the group consisting of barium-titanates, bismuth-titanates, barium-magnesium-titanates, lead-titanates, lead-zirconate-titanates, and lead-lanthanum-zirconate-titanates and combinations thereof.

Claim 6

The semiconductor apparatus in claim 3 in which the patterned conductive material is a semiconductor with a second conductivity type opposite that of the substrate and in contact with the substrate forming a p-n rectifying junction.

Claim 7

The semiconductor apparatus in claim 3 in which the patterned conductive material in contact with the substrate forms a Schottky-barrier rectifying junction.

Claim 8

The semiconductor apparatus in claim 5 in which the patterned conductive material is chosen from the group consisting of semiconductors, metals, conductive metal oxides, and conductive metal silicides.

Claim 9

A switching circuit comprising: (a) a semiconductor substrate of a first conductivity type, the substrate having a device surface; (b) a patterned insulating layer formed on the device surface having at least one region of access to the semiconductor substrate; (c) a patterned electrically conductive material in contact with the semiconductor substrate in an access region, the electrically conductive material in combination with the semiconductor substrate forming a rectifying junction with a conduction characteristic; (d) a pair of electrodes connected to opposite sides of the rectifying junction, with a first electrode being connected to the semiconductor substrate and a second electrode being connected to the patterned electrically conductive material; (e) means for applying an electrical potential across the rectifying junction to bias the rectifying junction in a forward direction of conduction; (f) at least one electric field generating layer deposited over the patterned conductive material in the vicinity of the rectifying junction, the at least one electric field generating layer having a third electrode connected thereto; and (g) means for applying a programming signal across the electric field generating layer to establish an electric field component whereby the forward conduction characteristic of the rectifying junction is altered.

Claim 10

A switching circuit comprising: (a) a semiconductor substrate of a first conductivity type, the substrate having a device surface; (b) a patterned insulating layer formed on the device surface having at least one region of access to the semiconductor substrate; (c) a patterned electrically conductive material in contact with the semiconductor substrate in an access region, the electrically conductive material in combination with the semiconductor substrate forming a rectifying junction with a conduction characteristic; (d) a pair of electrodes connected to opposite sides of the rectifying junction, with a first electrode being connected to the semiconductor substrate and a second electrode being connected to the patterned electrically conductive material; (e) means for applying an electrical potential across the rectifying junction to bias the rectifying junction in a forward direction of conduction; (f) at least one electric field generating layer deposited over the patterned conductive material in the vicinity of the rectifying junction, the at least one electric field generating layer having a third electrode connected thereto; and (g) means for applying a programming signal across the electric field generating layer to establish an electric field component whereby the forward conduction characteristic of the rectifying junction is altered.

Claim 11

The switching circuit in claim 8 in which the at least one electric field generating layer is formed from a ferroelectric material.

Claim 12

The switching circuit in claim 9 in which the ferroelectric material has at least one polarization state with a remanent electric field component, a particular polarization state being selected by the programming signal.

Claim 13

The switching circuit in claim 10 in which the patterned conductive material in contact with the substrate forms a p-n rectifying junction.

Claim 14

The switching circuit in claim 10 in which the patterned conductive material in contact with the substrate forms a Schottky-barrier rectifying junction.

Claim 15

The switching circuit in claim 10 in the form of a memory element having in one polarization state a forward conduction characteristic and in a second polarization state a substantially different forward conduction characteristic.

Claim 16

An array of memory elements as in claim 13, the array further comprising means for addressing the individual memory elements.

Claim 17

The array in claim 14 in the form of an integrated circuit.

Claim 18

Apparatus for the storage of information comprising: (a) a plurality of isolated semiconductor switching devices formed on a semiconductor substrate, each semiconductor switching device further comprising a diffusion region formed in the semiconductor substrate; a patterned insulating layer formed on a device surface of the semiconductor substrate and having a region of access to the diffusion region; a patterned electrically conductive material in contact with the diffusion region in the region of access forming a rectifying junction with a conduction characteristic; a pair of electrodes connected to opposite sides of the rectifying junction; and a patterned electric field generating region deposited over the conductive material in the vicinity of the rectifying junction and having a third electrode connected thereto; (b) a programming means for addressing the electric field generating region of each semiconductor switching device to write a memory state therein; and (c) a readout means for addressing the rectifying junction of each semiconductor switching device to read a memory state therefrom.

Claim 19

Apparatus for the storage of information comprising: (a) a plurality of isolated semiconductor switching devices formed on a semiconductor substrate, each semiconductor switching device further comprising a diffusion region formed in the semiconductor substrate; a patterned insulating layer formed on a device surface of the semiconductor substrate and having a region of access to the diffusion region; a patterned electrically conductive material in contact with the diffusion region in the region of access forming a rectifying junction with a conduction characteristic; a pair of electrodes connected to opposite sides of the rectifying junction; and a patterned electric field generating region deposited over the conductive material in the vicinity of the rectifying junction and having a third electrode connected thereto; (b) a programming means for addressing the electric field generating region of each semiconductor switching device to write a memory state therein; and (c) a readout means for addressing the rectifying junction of each semiconductor switching device to read a memory state therefrom.

Claim 20

The apparatus in claim 16 in which the electric field generating regions are formed from a ferroelectric material.

Claim 21

The apparatus in claim 17 in which the memory state of each switching device is determined by the conduction characteristic of the rectifying junction therein, the conduction characteristic being altered by a remanent polarization state of the ferroelectric material.

Claim 22

The apparatus in claim 18 in which the rectifying junction is a semiconductor p-n junction.

Claim 23

The apparatus in claim 18 in which the rectifying junction is a Schottky-barrier junction.

Claim 24

The apparatus in claim 18 in the form of an integrated circuit.