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US5229309A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing semiconductor device using a ferroelectric film over a source region

Assignee: Ramtron International Corp
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Filing: 1991-05-31
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Granted: 1993-07-20
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Expires: 2011-05-31
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Abstract

Abstract A method for manufacturing a memory integrating a ferroelectric film, having properties such as excellent information rewriting times, breakdown voltage and leak current and the like, by forming a lower electrode sandwiching a ferroelectric material on a high concentration diffusion layer, such as source and drain regions, formed on a semiconductor substrate, and forming a polysilicon film between the electrode and the high concentration diffusion layer. A semiconductor device formed by the method of the present invention is also disclosed.

Inventors

  • 👤 Koji Kato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 17:05
CPC Classifications
H; H10; H10B; H10B53/00; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 147 words
A method for forming a semiconductor device comprising the steps of: forming a source region and a drain region located in a substrate with a gate electrode over said substrate and between said source region and said drain region; establishing an insulating layer over said substrate and around said gate electrode; establishing a contact hole in said insulating layer to said source region; establishing a polysilicon film located directly over and in direct contact with the source region in said contact hole, the polysilicon film also being located over said insulating layer; establishing a lower electrode over said polysilicon film; establishing a ferroelectric film over said lower electrode; etching said lower electrode and said ferroelectric film; etching said polysilicon film so that said polysilicon film is in said contact hole and over a portion of said insulating layer; and establishing an upper electrode over said ferroelectric film.
Claim 2
Independent Claim 147 words
A method for forming a semiconductor device comprising the steps of: forming a source region and a drain region located in a substrate with a gate electrode over said substrate and between said source region and said drain region; establishing an insulating layer over said substrate and around said gate electrode; establishing a contact hole in said insulating layer to said source region; establishing a polysilicon film located directly over and in direct contact with the source region in said contact hole, the polysilicon film also being located over said insulating layer; establishing a lower electrode over said polysilicon film; establishing a ferroelectric film over said lower electrode; etching said lower electrode and said ferroelectric film; etching said polysilicon film so that said polysilicon film is in said contact hole and over a portion of said insulating layer; and establishing an upper electrode over said ferroelectric film.
Claim 3
Dependent Claim 31 words
The method of claim 1 wherein said polysilicon film is established by chemically vapor growing said film and has a thickness at least equal to the thickness of the insulating layer.
Claim 4
Dependent Claim 33 words
The method of claim 1 further comprising the steps of establishing a second insulating layer over said insulating layer and defining a wiring electrode in said second insulating layer to said drain region.
Claim 5
Dependent Claim 102 words
A semiconductor device comprising: a substrate with a source region and a drain region located therein; a gate electrode located over said substrate and between said source region and said drain region; an insulating layer located over said substrate and around said gate electrode; a polysilicon film located in a contact hole in said insulating layer and located directly over and in direct contact with said source region and located over a portion of said insulating layer; a lower electrode located over said polysilicon film; a ferroelectric film located over said lower electrode; and an upper electrode located over said ferroelectric film.
Claim 6
Dependent Claim 102 words
A semiconductor device comprising: a substrate with a source region and a drain region located therein; a gate electrode located over said substrate and between said source region and said drain region; an insulating layer located over said substrate and around said gate electrode; a polysilicon film located in a contact hole in said insulating layer and located directly over and in direct contact with said source region and located over a portion of said insulating layer; a lower electrode located over said polysilicon film; a ferroelectric film located over said lower electrode; and an upper electrode located over said ferroelectric film.
Claim 7
Dependent Claim 22 words
The device of claim 4 wherein said lower electrode is comprised of a element from the group comprises of platinum and palladium.
Claim 8
Dependent Claim 13 words
The device of claim 4 wherein said ferroelectric film is comprised of PZT.
Claim 9
Dependent Claim 13 words
The device of claim 4 wherein said upper electrode is comprised of aluminum.

References Cited (Backward Citations)

US5024964A Cited
US4149302A Cited
US4437139A Cited
US5046043A Cited
US4888630A Cited
EP0338157A2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-07-19 1997-01-18 1997-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-07-19 2001-01-18 2001-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-07-19 2005-01-18 2005-07-20 $7700.00 Window Closed / Lapsed

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