US6009191A — Computer implemented method for compressing 48-bi…

Claim 1

Independent Claim 179 words

In a computer system a method for compressing bit formats in a first packed data sequence, said method comprising the steps of: masking, in response to executing a single first instruction, multiple data elements of said first packed data sequence, in parallel; generating, in response to executing a single second instruction, a second packed data sequence by copying said multiple data elements of said first packed data sequence, in parallel; performing a first shift operation, in response to executing a single third instruction, by independtly shifting each of said multiple data elements of said first packed data sequence, in parallel; generating, in response to executing a single fourth instruction, an intermediate result by joining said first and second packed data sequences, in parallel; performing a second shift operation, in response to executing a single fifth instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; and generating, in response to executing a single sixth instruction, a final result by joining said first packed data sequence and said intermediate result, in parallel.

Claim 2

Dependent Claim 179 words

In a computer system a method for compressing bit formats in a first packed data sequence, said method comprising the steps of: masking, in response to executing a single first instruction, multiple data elements of said first packed data sequence, in parallel; generating, in response to executing a single second instruction, a second packed data sequence by copying said multiple data elements of said first packed data sequence, in parallel; performing a first shift operation, in response to executing a single third instruction, by independtly shifting each of said multiple data elements of said first packed data sequence, in parallel; generating, in response to executing a single fourth instruction, an intermediate result by joining said first and second packed data sequences, in parallel; performing a second shift operation, in response to executing a single fifth instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; and generating, in response to executing a single sixth instruction, a final result by joining said first packed data sequence and said intermediate result, in parallel.

Claim 3

Dependent Claim 36 words

The method of claim 1, wherein said first packed data sequence includes a first, second, and third datum, each placed in separate packed words; and said final result including one packed word representing said three datums.

Claim 4

Dependent Claim 23 words

The method of claim 2, wherein said three datums are represented in adjacent packed words in said first and second packed data sequences.

Claim 5

Dependent Claim 37 words

The method of claim 3, wherein said first shift operation further includes shifting said second datum to a bit position adjacent to a most significant bit position of said first datum in said second packed data sequence.

Claim 6

Dependent Claim 66 words

The method of claim 4, wherein said intermediate result includes a first packed word having said first and second datums in one packed word; and said shift operation further includes shifting said third datum, in said first packed data sequence, to a bit position adjacent to a most significant bit position of said first and second datums in said first packed word of said intermediate results.

Claim 7

Dependent Claim 24 words

The method of claim 5, wherein said first, second, and third datums jointly represent a pixel, wherein each of said datums represents a color.

Claim 8

Dependent Claim 14 words

The method of claim 6, wherein said datums are generated by a graphics pipeline.

Claim 9

Dependent Claim 185 words

A machine-readable medium having stored thereon data representing sequences of instructions for compressing bit formats in a first packed data sequence, said sequences of instruction which, when executed by a processor, cause said processor to perform the steps of: masking, in response to executing a single first instruction, multiple data elements of said first packed data sequence, in parallel; generating, in response to executing a single second instruction, a second packed data sequence by copying said first packed data sequence; performing a first shift operation, in response to executing a single third instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; generating, in response to executing a single fourth instruction, an intermediate result by joining said first and second packed data sequences; performing a second shift operation, in response to executing a single fifth instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; and generating, in response to executing a single sixth instruction, a final result by joining said first packed data sequence and said intermediate result.

Claim 10

Dependent Claim 185 words

A machine-readable medium having stored thereon data representing sequences of instructions for compressing bit formats in a first packed data sequence, said sequences of instruction which, when executed by a processor, cause said processor to perform the steps of: masking, in response to executing a single first instruction, multiple data elements of said first packed data sequence, in parallel; generating, in response to executing a single second instruction, a second packed data sequence by copying said first packed data sequence; performing a first shift operation, in response to executing a single third instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; generating, in response to executing a single fourth instruction, an intermediate result by joining said first and second packed data sequences; performing a second shift operation, in response to executing a single fifth instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; and generating, in response to executing a single sixth instruction, a final result by joining said first packed data sequence and said intermediate result.

Claim 11

Dependent Claim 37 words

The machine-readable medium of claim 8, wherein said first packed data sequence includes a first, second, and third datum, each placed in separate packed words; and said final result including one packed word representing said three datums.

Claim 12

Dependent Claim 24 words

The machine-readable medium of claim 9, wherein said three datums are represented in adjacent packed words in said first and second packed data sequences.

Claim 13

Dependent Claim 38 words

The machine-readable medium of claim 10, wherein said first shift operation further includes shifting said second datum to a bit position adjacent to a most significant bit position of said first datum in said second packed data sequence.

Claim 14

Dependent Claim 68 words

The machine-readable medium of claim 11, said intermediate result includes a first packed word having said first and second datums in a first packed word; and said second shift operation further includes shifting said third datum, in said first packed data sequence, to a bit position adjacent to a most significant bit position of said first and second datums in said first packed word of said intermediate results.

Claim 15

Dependent Claim 25 words

The machine-readable medium of claim 12, wherein said first, second, and third datums jointly represent a pixel, wherein each of said datums represent a color.

Claim 16

Dependent Claim 15 words

The machine-readable medium of claim 13, wherein said datums are generated by a graphics pipeline.

Claim 17

Dependent Claim 106 words

A computer-implemented method for compressing bit formats in a first packed data sequence and a second packed data sequence, said method comprising: generating a third packed data sequence having a first portion of said first packed data sequence and a first portion of said second packed data sequence; replacing said first portion of said first packed data sequence with a second portion of said second packed data sequence; shifting, in response to executing a single first instruction, selected data elements of said first packed data sequence; shifting said third packed data sequence; and generating a final result by joining said first and third packed data sequences.

Claim 18

Dependent Claim 106 words

A computer-implemented method for compressing bit formats in a first packed data sequence and a second packed data sequence, said method comprising: generating a third packed data sequence having a first portion of said first packed data sequence and a first portion of said second packed data sequence; replacing said first portion of said first packed data sequence with a second portion of said second packed data sequence; shifting, in response to executing a single first instruction, selected data elements of said first packed data sequence; shifting said third packed data sequence; and generating a final result by joining said first and third packed data sequences.

Claim 19

Dependent Claim 74 words

The method of claim 15, wherein said first packed data sequence includes a first, second, and third datums, each placed in separate packed words, and said second packed data sequence further includes a fourth, fifth, and sixth datums, each placed in separate packed words; and said final result includes a first packed word representing said first, second, and third datums, and further includes a second packed word representing said fourth, fifth, and sixth datums.

Claim 20

Dependent Claim 67 words

The method of claim 16, wherein prior to performing the step of generating said third packed data sequence, performing the steps of: masking a portion of said first packed data sequence, wherein said first, second, and third datums are truncated to a target size, and masking a portion of said second packed data sequence, wherein said fourth, fifth, and sixth datums are truncated to a target size.

Claim 21

Dependent Claim 46 words

The method of claim 17, wherein said step of shifting in response to a single first instruction includes generating an intermediate result, by multiplying data elements of said first packed data sequence with corresponding data elements of a fourth packed data sequence, and adding adjacent products.

Claim 22

Dependent Claim 29 words

The method of claim 18, wherein said adding of adjacent products in said step of generating said intermediate result, includes performing a bit-wise logical OR operation between adjacent products.

Claim 23

Dependent Claim 37 words

The method of claim 19, wherein said first, second, and third datums jointly represent a first pixel, and said fourth, fifth, and sixth datums, jointly represent a second pixel, wherein each of said datums represent a color.

Claim 24

Dependent Claim 14 words

The method of claim 20, wherein said datums are generated by a graphics pipeline.

Claim 25

Dependent Claim 129 words

A machine-readable medium having stored thereon data representing sequences of instructions for compressing bit formats in a first packed data sequence and a second packed data sequence, said sequences of instruction which, when executed by a processor, cause said processor to perform the steps of: generating a third packed data sequence having a first portion of said first packed data sequence and a first portion of said second packed data sequence; replacing said first portion of said first packed data sequence with a second portion of said second packed data sequence; shifting, in response to executing a single first instruction, selected data elements of said first packed data sequence; shifting said third packed data sequence; and generating a final result by joining said first and third packed data sequences.

Claim 26

Dependent Claim 129 words

A machine-readable medium having stored thereon data representing sequences of instructions for compressing bit formats in a first packed data sequence and a second packed data sequence, said sequences of instruction which, when executed by a processor, cause said processor to perform the steps of: generating a third packed data sequence having a first portion of said first packed data sequence and a first portion of said second packed data sequence; replacing said first portion of said first packed data sequence with a second portion of said second packed data sequence; shifting, in response to executing a single first instruction, selected data elements of said first packed data sequence; shifting said third packed data sequence; and generating a final result by joining said first and third packed data sequences.

Claim 27

Dependent Claim 75 words

The machine-readable medium of claim 22, wherein said first packed data sequence includes a first, second, and third datum, each placed in separate packed words, and said second packed data sequence further includes a fourth, fifth, and sixth datum, each placed in separate packed words; and said final result includes a first packed word representing said first, second, and third datums, and further includes a second packed word representing said fourth, fifth, and sixth datums.

Claim 28

Dependent Claim 68 words

The machine-readable medium of claim 23, wherein prior to performing the step of generating said third packed data sequence, performing the steps of: masking a portion of said first packed data sequence, wherein said first, second, and third datums are truncated to a target size, and masking a portion of said second packed data sequence, wherein said fourth, fifth and sixth datums are truncated to a target size.

Claim 29

Dependent Claim 47 words

The machine-readable medium of claim 24, wherein said step of shifting in response to a single first instruction includes generating an intermediate result, by multiplying data elements of said first packed data sequence with corresponding data elements of a fourth packed data sequence, and adding adjacent products.

Claim 30

Dependent Claim 30 words

The machine-readable medium of claim 25, wherein said adding of adjacent products in said step of generating said intermediate results, includes performing a bit-wise logical OR operation between adjacent products.

Claim 31

Dependent Claim 38 words

The machine-readable medium of claim 26, wherein said first, second, and third datums jointly represent a first pixel, and said fourth, fifth, and sixth datums, jointly represent a second pixel, wherein each of said datums represent a color.

Claim 32

Dependent Claim 15 words

The machine-readable medium of claim 27, wherein said datums are generated by a graphics pipeline.

Claim 33

Dependent Claim 159 words

In a computer system a method for compressing bit formats in a first packed data sequence, said method comprising the steps of: generating a second packed data sequence, in response to executing a single MOVQ instruction, by copying said first packed data sequence; performing a first shift operation, in response to executing a single PSRLQ instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; generating an intermediate result, in response to executing a single POR instruction, by performing a bit wise logical OR operation between said first and second packed data sequences; performing a second shift operation, in response to executing a single PSRLQ instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; generating a final response to executing a single POR instruction, by performing a bit wise logical OR operation between said first packed data sequence and said intermediate result.

Claim 34

Dependent Claim 159 words

In a computer system a method for compressing bit formats in a first packed data sequence, said method comprising the steps of: generating a second packed data sequence, in response to executing a single MOVQ instruction, by copying said first packed data sequence; performing a first shift operation, in response to executing a single PSRLQ instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; generating an intermediate result, in response to executing a single POR instruction, by performing a bit wise logical OR operation between said first and second packed data sequences; performing a second shift operation, in response to executing a single PSRLQ instruction, by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; generating a final response to executing a single POR instruction, by performing a bit wise logical OR operation between said first packed data sequence and said intermediate result.

Claim 35

Dependent Claim 181 words

A computer-implemented method for compressing bit formats in a first packed data sequence and a second packed data sequence, said method comprising: generating a third packed data sequence, in response to executing a single MOVQ instruction, by copying said first packed data sequence; replacing a low double packed word of said third packed data sequence with a high double packed word of said third packed data sequence, and replacing said high double packed word of said third packed data sequence with a high double packed word of said second packed data sequence, in response to executing a single PUNPCKDQ instruction; generating an intermediate result, in response to executing a single PMADD instruction, by multiplying data elements of said first packed data sequence with corresponding data elements of a fourth packed data sequence, and adding adjacent products; shifting said third packed data sequence, in response to executing a single PSLLD instruction; generating a final result, in response to executing a single POR instruction, wherein a bit wise logical OR operation is performed between said third packed data sequence and said intermediate result.

Claim 36

Dependent Claim 181 words

A computer-implemented method for compressing bit formats in a first packed data sequence and a second packed data sequence, said method comprising: generating a third packed data sequence, in response to executing a single MOVQ instruction, by copying said first packed data sequence; replacing a low double packed word of said third packed data sequence with a high double packed word of said third packed data sequence, and replacing said high double packed word of said third packed data sequence with a high double packed word of said second packed data sequence, in response to executing a single PUNPCKDQ instruction; generating an intermediate result, in response to executing a single PMADD instruction, by multiplying data elements of said first packed data sequence with corresponding data elements of a fourth packed data sequence, and adding adjacent products; shifting said third packed data sequence, in response to executing a single PSLLD instruction; generating a final result, in response to executing a single POR instruction, wherein a bit wise logical OR operation is performed between said third packed data sequence and said intermediate result.

Claim 37

Dependent Claim 111 words

A computer-implemented method for compressing bits, said method comprising: masking a portion multiple data elements of a first packed data sequence, in parallel; generating a second packed data sequence by copying said first packed data sequence, in parallel; performing a first shift operation by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; generating an intermediate result by joining said first and second packed data sequences; performing a second shift operation by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; and generating a final result by joining said first packed data sequence and said intermediate result.

Claim 38

Dependent Claim 111 words

A computer-implemented method for compressing bits, said method comprising: masking a portion multiple data elements of a first packed data sequence, in parallel; generating a second packed data sequence by copying said first packed data sequence, in parallel; performing a first shift operation by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; generating an intermediate result by joining said first and second packed data sequences; performing a second shift operation by independently shifting each of said multiple data elements of said first packed data sequence, in parallel; and generating a final result by joining said first packed data sequence and said intermediate result.

Claim 39

Dependent Claim 36 words

The method of claim 31, wherein said first packed data sequence includes a first, second, and third datum, each placed in separate packed words; and said final result including one packed word representing said three datums.

Claim 40

Dependent Claim 23 words

The method of claim 32, wherein said three datums are represented in adjacent packed words in said first and second packed data sequences.

Claim 41

Dependent Claim 37 words

The method of claim 33, wherein said first shift operation further includes shifting said second datum to a bit position adjacent to a most significant bit position of said first datum in said second packed data sequence.

Claim 42

Dependent Claim 66 words

The method of claim 34, wherein said intermediate result includes a first packed word having said first and second datums in one packed word; and said shift operation further includes shifting said third datum, in said first packed data sequence, to a bit position adjacent to a most significant bit position of said first and second datums in said first packed word of said intermediate results.

Claim 43

Dependent Claim 24 words

The method of claim 35, wherein said first, second, and third datums jointly represent a pixel, wherein each of said datums represents a color.

Claim 44

Dependent Claim 14 words

The method of claim 36, wherein said datums are generated by a graphics pipeline.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2002-12-27	2003-06-28	2003-12-28	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2006-12-27	2007-06-28	2007-12-28	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2010-12-27	2011-06-28	2011-12-28	$7700.00	Window Closed / Lapsed

Computer implemented method for compressing 48-bit pixels to 16-bit pixels

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