Multiplying unit in a computer system, capable of population counting

Claim 2

A multiplying unit provided in a computer system, to perform multiplication of multiplicand data and multiplier data in a multiplication mode and to perform population counting of population counting input data in a population counting mode, said multiplying unit comprising: means for dividing the multiplicand data into a plurality of multiplicand elements having a first size in the multiplicand mode; dividing means for dividing the multiplier data into a plurality of multiplier elements having a second size in the multiplication mode, and for dividing the population counting input data into a plurality of population counting elements of the second size in the population counting mode; a plurality of multiplying sub-units for executing simultaneously partial multiplication among the multiplicand elements and the multiplier elements when in the multiplication mode to produce partial product data, and for executing simultaneously partial population countings for the population counting elements when in the population counting mode to produce partial counted data; and means for adding the partial product data from said multiplying sub-units and outputting a multiplication result of the multiplicand data and the multiplier data when in the multiplication mode, and for adding the partial counted data from said multiplying sub-units and outputting a population counting result of the population counting input data when in the population counting mode.

Claim 3

A multiplying unit according to claim 1, wherein at least one of said plurality of multiplying sub-units is a first type multiplying sub-unit, each said first type multiplying sub-unit comprising: a first sub-unit register, having bit positions, for storing one of the multiplier elements in the multiplication mode, and for storing one of the population counting elements as a corresponding population counting element in the population counting mode; a second carry save adder, operatively connected to said first sub-unit register, for counting the number of "1" bits in the corresponding population counting element stored in said first sub-unit register by simultaneously inputting every pair of bits in the corresponding population counting element, each pair of bits stored in two adjacent bit positions in said first sub-unit register, and for outputting an elemental sum and elemental carry data for each pair of bits of the corresponding population counting element; a second sub-unit register for storing and outputting one of the multiplicand elements in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode; a decoder, operatively connected to said first sub-unit register, for outputting decoded signals required for multiplying the multiplicand element and the multiplier element upon inputting the multiplier element from said first sub-unit register in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode; a multiple generator, operatively connected to said second sub-unit register and said decoder, for generating and outputting shifted data by combining the multiplicand element from said second sub-unit register and the decoded signals from said decoder in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode; summing means, having a first carry save adder and a first carry propagate adder, for outputting the partial product data of the partial multiplication of the multiplicand element and the multiplier element upon adding the shifted data from said multiple generator in the multiplication mode, and for outputting the partial counted data of the number of "1" bits in the population counting element upon adding the elemental sum and elemental carry data from said second carry save adder in the population counting mode; and selector means for selecting one of the shifted data from said multiple generator and the elemental sum and elemental carry data from said second carry save adder to send to said summing means in accordance with the multiplication mode and the population counting mode, respectively.

Claim 4

A multiplying unit according to claim 2, wherein at least one of said plurality of multiplying sub-units is a second type multiplying sub-unit, each said second type multiplying sub-unit comprising: a third sub-unit register for storing and outputting one of the multiplier elements in the multiplication mode; a fourth sub-unit register for setting and outputting one of the multiplicand elements in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode; and a decoder, operatively connected to said third sub-unit register, for outputting decoded signals required for multiplying the multiplicand element and the multiplier element upon inputting the multiplier element from said third sub-unit register in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode.

Claim 5

A multiplying unit according to claim 2, wherein said dividing means divides the multiplier data into a first quantity of multiplier elements when in the multiplication mode, and divides the population counting input data into the first quantity of population counting elements when in the population counting mode, and wherein the number of said first type multiplying sub-units equals the first quantity.

Claim 6

A multiplying unit according to claim 1, wherein said dividing means divides the multiplier data into a first quantity of multiplier elements when in the multiplication mode, and divides the population counting input data into the first quantity of population counting elements when in the population counting mode.

Claim 7

A multiplying unit provided in a computer system, to perform multiplication of multiplicand data and multiplier data in a multiplication mode and to perform population counting of population counting input data in a population counting mode, said multiplying unit comprising: means for storing the multiplicand data in the multiplication mode; dividing means for dividing the multiplier data into a plurality of multiplier elements having an element size in the multiplication mode, and dividing the population counting input data into a plurality of population counting elements of the element size when in the population counting mode; a plurality of multiplying sub-units for executing simultaneously partial multiplication among the multiplicand data and the multiplier elements when in the multiplication mode to produce partial product data, and for executing simultaneously partial population countings for the population counting elements when in the population counting mode to produce partial counted data; and means for adding the partial product data from said multiplying sub-units and outputting a multiplication result of the multiplicand data and the multiplier data when in the multiplication mode, and for adding the partial counted data from said multiplying sub-units and outputting a population counting result of the population counting input data when in the population counting mode.

Claim 8

A multiplying unit provided in a computer system, to perform multiplication of multiplicand data and multiplier data in a multiplication mode and to perform population counting of population counting input data in a population counting mode, said multiplying unit comprising: means for storing the multiplicand data in the multiplication mode; dividing means for dividing the multiplier data into a plurality of multiplier elements having an element size in the multiplication mode, and dividing the population counting input data into a plurality of population counting elements of the element size when in the population counting mode; a plurality of multiplying sub-units for executing simultaneously partial multiplication among the multiplicand data and the multiplier elements when in the multiplication mode to produce partial product data, and for executing simultaneously partial population countings for the population counting elements when in the population counting mode to produce partial counted data; and means for adding the partial product data from said multiplying sub-units and outputting a multiplication result of the multiplicand data and the multiplier data when in the multiplication mode, and for adding the partial counted data from said multiplying sub-units and outputting a population counting result of the population counting input data when in the population counting mode.

Claim 9

A multiplying unit according to claim 6, wherein at least one of said plurality of multiplying sub-units is a first type multiplying sub-unit, each said first type multiplying sub-unit comprising: a first sub-unit register, having bit positions, for storing one of the multiplier elements in the multiplication mode, and for storing one of the population counting elements as a corresponding population counting element in the population counting mode; a second carry save adder, operatively connected to said first sub-unit register, for counting the number of "1" bits in the corresponding population counting element stored in said first sub-unit register by simultaneously inputting every pair of bits in the corresponding population counting element, each pair of bits stored in two adjacent bit positions in said first sub-unit register, and for outputting an elemental sum and elemental carry data for each pair of bits of the corresponding population counting element; a second sub-unit register for storing and outputting the multiplicand data in the multiplicand mode, and for generating and outputting all "0" bits in the population counting mode; a decoder, operatively connected to said first sub-unit register, for outputting decoded signals required for multiplying the multiplicand data and the multiplier element upon inputting the multiplier element from said first sub-unit register in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode; a multiple generator, operatively connected to said second sub-unit register and said decoder, for generating and outputting shifted data by combining the multiplicand data from said second sub-unit register and the decoded signals from said decoder in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode; summing means, having a first carry save adder and a first carry propagate adder, for outputting the partial product data of the partial multiplication of the multiplicand data and the multiplier element upon adding the shifted data from said multiple generator in the multiplication mode, and for outputting the partial counted data of the number of "1" bits in the population counting element upon adding the elemental sum and elemental carry data from said second carry save adder in the population counting mode; and selector means for selecting one of the shifted data from said multiple generator and the elemental sum and elemental carry data from said second carry save adder to send to said summing means in accordance with the multiplication mode and the population counting mode, respectively.

Claim 10

A multiplying unit according to claim 7, wherein at least one of said plurality of multiplying sub-units is a second type multiplying sub-unit, each said second type multiplying sub-unit comprising: a third sub-unit register for storing and outputting one of the multiplier elements in the multiplication mode; a fourth sub-unit register for storing and outputting the multiplicand data in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode; and a decoder, operatively connected to said third sub-unit register, for outputting decoded signals required for multiplying the multiplicand data and the multiplier element upon inputting the multiplier element from said third sub-unit register in the multiplication mode, and for generating and outputting all "0" bits in the population counting mode.

Claim 11

A multiplying unit according to claim 7, wherein said dividing means divides the multiplier data into a first quantity of multiplier elements when in the multiplication mode, and divides the population counting input data into the first quantity of population counting elements when in the population counting mode, and wherein the number of said first type multiplying sub-units equals the first quantity.

Claim 12

A multiplying unit according to claim 9, wherein all of said plurality of multiplying sub-units are of the first type multiplying sub-unit.

Claim 13

A multiplying unit according to claim 6, wherein said dividing means divides the multiplier data into a first quantity of multiplier elements when in the multiplication mode, and divides the population counting input data into the first quantity of population counting elements when in the population counting mode.