Lsi multiplication block

Abstract

Abstract PURPOSE:To perform multiplication processing while one of multiplication cells for (nXn) bits required for the multiplication (2nX2n) bits is disconnected if it is defective, by arraying the multiplication cells and by performing the multiplication of the said bits. CONSTITUTION:Four multiplication units 1a, 1b, 1c, and 1d for the multiplication processing of (nXn) bits are arranged annularly on one chip, and mutual adjacent units input data A, B, C, and D from input buffers 3a, 3b, 3c, and 3d through input data buses 4a, 4b, 4c, and 4d and then outputs multiplication output data through output data buses 2a, 2b, 2c, and 2d. Thus, the respective units perform operations (AXB), (BXC), (CXD), and (DXA) simultaneously. If there is a defective on the chip, a defective unit detected by the output of test data from two input buffers is disabled and the remaining normal units perform the multiplication (nXn) bits indepently.

Inventors

• 👤 Masamichi Sugai

Bibliographic Details