Method of making graded channel effect transistor

Claim 1

A process for fabricating a modulation doped MOSFET comprising the steps of: forming a monocrystalline substrate of a first semiconductor material; forming a strained, pseudomorphic, monocrystalline, undoped epitaxial channel layer over said substrate to define a first interface therebetween, said channel layer comprising an alloy of said first semiconductor material and a second semiconductor material, said channel being formed by grading said alloy such that the concentration of said second semiconductor material with respect to said first semiconductor material is increased to a single peak percentage level to provide a single active transport region located within said channel layer that coincides with said peak percentage level, the concentration of said second semiconductor material with respect to said first semiconductor being asymmetric relative to said peak percentage level; forming an epitaxial cap layer of said first semiconductor material on said channel layer to define a second interface therebetween; forming a gate insulator layer on said cap layer; forming a gate electrode on said gate insulator layer; and, forming source and drain regions of one conductivity type in said cap layer and said channel layer, and on opposite sides of said gate electrode.