Semiconductor device and method for fabricating the same

Claim 1

A method for fabricating a semiconductor device comprising the steps of: forming a projection over a semiconductor substrate of a first conductivity, said projection is a diffusion source for an impurity; diffusing said impurity into said semiconductor substrate from said projection to define a first region having a second conductivity; forming an insulating layer over said semiconductor substrate and said projection; forming a conductive film over said insulating layer; removing a portion of said conductive film by anisotropic etching to form a gate electrode having a thick film section located over said insulating layer and adjacent to a side wall of said projection and to form a thin film section having a thickness sufficient to pass an ionized impurity; implanting the ionized impurity into said semiconductor substrate with said projection and said thick film section of said gate electrode used as masks to define a second region having said second conductivity, thereby allowing a portion of said second region to be defined under said thin film section.

Claim 2

A method for fabricating a semiconductor device comprising the steps of: forming a projection over a semiconductor substrate of a first conductivity, said projection is a diffusion source for an impurity; diffusing said impurity into said semiconductor substrate from said projection to define a first region having a second conductivity; forming an insulating layer over said semiconductor substrate and said projection; forming a conductive film over said insulating layer; removing a portion of said conductive film by anisotropic etching to form a gate electrode having a thick film section located over said insulating layer and adjacent to a side wall of said projection and to form a thin film section having a thickness sufficient to pass an ionized impurity; implanting the ionized impurity into said semiconductor substrate with said projection and said thick film section of said gate electrode used as masks to define a second region having said second conductivity, thereby allowing a portion of said second region to be defined under said thin film section.

Claim 3

A method for fabricating a split gate type transistor comprising the steps of: forming a floating gate electrode over a semiconductor substrate having a first conductivity; forming a side wall spacer adjoining to a side wall of said floating gate electrode; forming a film of a conductive material over said floating gate electrode and said side wall spacer; removing a portion of said conductive film to form a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section including said side wall spacer and being located adjacent to said floating gate electrode, said thin film being formed to have a thickness sufficient to pass a first ionized impurity; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing a portion of said second region to be defined under said thin film section.

Claim 4

A method for fabricating a split gate type transistor comprising the steps of: forming a floating gate electrode over a semiconductor substrate having a first conductivity; forming a side wall spacer adjoining to a side wall of said floating gate electrode; forming a film of a conductive material over said floating gate electrode and said side wall spacer; removing a portion of said conductive film to form a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section including said side wall spacer and being located adjacent to said floating gate electrode, said thin film being formed to have a thickness sufficient to pass a first ionized impurity; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing a portion of said second region to be defined under said thin film section.

Claim 5

A method for fabricating a split gate type transistor comprising the steps of: forming a first insulating layer over a semiconductor substrate having a first conductivity; forming a floating gate electrode over said first insulating layer; forming a second insulating layer over said floating gate electrode and said semiconductor substrate; forming a first film of a conductive material over said second insulating layer; removing a portion of said first film by etch-back to form a side wall spacer adjoining to a side wall of said floating gate electrode; forming a second film of a conductive material over said second insulating layer and said side wall spacer; removing a portion of said second film by anisotropic etching to form a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section including said side wall spacer and being located adjacent to said floating gate electrode, said thin film section being formed to have a thickness sufficient to pass a first ionized impurity; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing a portion of said second region to be defined under said thin film section.

Claim 6

A method for fabricating a split gate type transistor comprising the steps of: forming a first insulating layer over a semiconductor substrate having a first conductivity; forming a floating gate electrode over said first insulating layer; forming a second insulating layer over said floating gate electrode and said semiconductor substrate; forming a first film of a conductive material over said second insulating layer; removing a portion of said first film by etch-back to form a side wall spacer adjoining to a side wall of said floating gate electrode; forming a second film of a conductive material over said second insulating layer and said side wall spacer; removing a portion of said second film by anisotropic etching to form a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section including said side wall spacer and being located adjacent to said floating gate electrode, said thin film section being formed to have a thickness sufficient to pass a first ionized impurity; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing a portion of said second region to be defined under said thin film section.

Claim 8

A method for fabricating a split gate type transistor comprising the steps of: forming a floating gate electrode over a semiconductor substrate having a first conductivity; forming a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section being located adjacent to said floating gate electrode, said thin film section being located over said semiconductor substrate and being formed to have a thickness sufficient to pass an ionized impurity; and implanting the ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a region having a second conductivity, thereby allowing a portion of said region to be defined under said thin film section.

Claim 9

A method for fabricating a split gate type transistor comprising the steps of: forming a floating gate electrode over a semiconductor substrate having a first conductivity; forming a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section being located adjacent to said floating gate electrode, said thin film section being located over said semiconductor substrate and being formed to have a thickness sufficient to pass an ionized impurity; and implanting the ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a region having a second conductivity, thereby allowing a portion of said region to be defined under said thin film section.

Claim 11

A method for fabricating a split gate type transistor comprising the steps of: forming a first insulating layer over a semiconductor substrate having a first conductivity; forming a floating gate electrode over said first insulating layer; forming a second insulating layer over said floating gate electrode and said semiconductor substrate; forming a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section being located adjacent to said floating gate electrode, said thin film section being formed to have a thickness sufficient to pass a first ionized impurity; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing a portion of said second region to be defined under said thin film section.

Claim 12

A method for fabricating a split gate type transistor comprising the steps of: forming a first insulating layer over a semiconductor substrate having a first conductivity; forming a floating gate electrode over said first insulating layer; forming a second insulating layer over said floating gate electrode and said semiconductor substrate; forming a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section being located adjacent to said floating gate electrode, said thin film section being formed to have a thickness sufficient to pass a first ionized impurity; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing a portion of said second region to be defined under said thin film section.

Claim 14

A method for fabricating a split gate type transistor comprising the steps of: forming a floating gate electrode over a semiconductor substrate having a first conductivity; forming a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section being located adjacent to said floating gate electrode, said thin film section being formed to have a thickness sufficient to pass a first ionized impurity; forming a side wall spacer adjacent to said thick film section and located over a portion of said thin film section; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing said second region to be defined under a remaining portion of said thin film section.

Claim 15

A method for fabricating a split gate type transistor comprising the steps of: forming a floating gate electrode over a semiconductor substrate having a first conductivity; forming a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section being located adjacent to said floating gate electrode, said thin film section being formed to have a thickness sufficient to pass a first ionized impurity; forming a side wall spacer adjacent to said thick film section and located over a portion of said thin film section; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing said second region to be defined under a remaining portion of said thin film section.

Claim 17

A method for fabricating a split gate type transistor comprising the steps of: forming a first insulating layer over a semiconductor substrate having a first conductivity; forming a floating gate electrode over said first insulating layer; forming a second insulating layer over said floating gate electrode and said semiconductor substrate; forming a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section being located adjacent to said floating gate electrode, said thin film section being formed to have a thickness sufficient to pass a first ionized impurity; forming a side wall spacer adjacent to said thick film section and located over a portion of said thin film section; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing said second region to be defined under a remaining portion of said thin film section.

Claim 18

A method for fabricating a split gate type transistor comprising the steps of: forming a first insulating layer over a semiconductor substrate having a first conductivity; forming a floating gate electrode over said first insulating layer; forming a second insulating layer over said floating gate electrode and said semiconductor substrate; forming a control gate electrode including a select gate, said select gate having a thick film section and a thin film section, said thick film section being located adjacent to said floating gate electrode, said thin film section being formed to have a thickness sufficient to pass a first ionized impurity; forming a side wall spacer adjacent to said thick film section and located over a portion of said thin film section; implanting a second ionized impurity into said semiconductor substrate with said floating gate electrode used as a mask to define a first region having a second conductivity; and implanting the first ionized impurity into said semiconductor substrate with said control gate electrode used as a mask to define a second region having a second conductivity, thereby allowing said second region to be defined under a remaining portion of said thin film section.

Claim 20

A method for fabricating a split gate type transistor comprising the steps of: forming a floating gate electrode over a semiconductor substrate having a first conductivity; forming a control gate electrode located adjacent to the floating gate electrode, the control gate electrode forming step including a step of forming at least one side wall spacer included in the control gate electrode over the semiconductor substrate, wherein a thick film section of the control gate electrode is formed at a position where the at least one side wall spacer is formed, and wherein the thick film section serves as a select gate of a select transistor; and implanting an ionized impurity into the semiconductor substrate with the control gate electrode used as a mask to define a region having a second conductivity, thereby allowing the region to be defined at the end of the thick film section in a self-aligned manner.

Claim 21

A method for fabricating a split gate type transistor comprising the steps of: forming a floating gate electrode over a semiconductor substrate having a first conductivity; forming a control gate electrode located adjacent to the floating gate electrode, the control gate electrode forming step including a step of forming at least one side wall spacer included in the control gate electrode over the semiconductor substrate, wherein a thick film section of the control gate electrode is formed at a position where the at least one side wall spacer is formed, and wherein the thick film section serves as a select gate of a select transistor; and implanting an ionized impurity into the semiconductor substrate with the control gate electrode used as a mask to define a region having a second conductivity, thereby allowing the region to be defined at the end of the thick film section in a self-aligned manner.