Abstract A method for fabricating a CMOS device having BILLI (buried implanted layers for lateral isolation) structure capable of effectively preventing latch-up is disclosed, having the following steps. A mask pattern is formed on the semiconductor substrate of a predetermined conductivity type to expose a region where the MOS transistor, having a same conductivity type as that of the substrate, is to be formed wherein the mask pattern has a vertical boundary face having a gradual slope. A buried layer is then formed in the form of island by ion-implanting the impurity ions into the substrate to pass through the mask pattern, the buried layer having a same conductivity type as that of the substrate, and being formed to be continuous under the vertical boundary face of the mask pattern.
A method for fabricating a CMOS device with BILLI structure comprising the steps of: sequentially forming a first layer and a second layer on a semiconductor substrate of a first conductivity type; patterning the first and second layers to expose a region where a MOS transistor of the first conductivity type is to be formed; sequentially forming a third layer which is of the same material as the first layer, and a fourth layer which is of the same material as the second layer on the substrate; blanket-etching the third and fourth layers to form a spacer made of the third and the fourth layers on the side wall of the first and second layers, thereby forming a mask pattern having a vertical boundary face with a gradual slope; and ion-implanting impurity ions of the first conductivity type into the substrate to form a buried layer in a form of an island within the substrate, wherein the buried layer is continuous under the vertical boundary face of the mask pattern.
Claim 2
Independent Claim
170 words
A method for fabricating a CMOS device with BILLI structure comprising the steps of: sequentially forming a first layer and a second layer on a semiconductor substrate of a first conductivity type; patterning the first and second layers to expose a region where a MOS transistor of the first conductivity type is to be formed; sequentially forming a third layer which is of the same material as the first layer, and a fourth layer which is of the same material as the second layer on the substrate; blanket-etching the third and fourth layers to form a spacer made of the third and the fourth layers on the side wall of the first and second layers, thereby forming a mask pattern having a vertical boundary face with a gradual slope; and ion-implanting impurity ions of the first conductivity type into the substrate to form a buried layer in a form of an island within the substrate, wherein the buried layer is continuous under the vertical boundary face of the mask pattern.
Claim 3
Dependent Claim
27 words
The method of fabricating CMOS device as claimed in claim 1, wherein the first layer is an oxide layer and the second layer is a polysilicon layer.
Claim 4
Dependent Claim
27 words
The method of fabricating CMOS device as claimed in claim 1, wherein the first layer is an oxide layer and the second layer is a nitride layer.
Claim 5
Independent Claim
109 words
A method for fabricating a CMOS device with BILLI structure, comprising the steps of: forming a photoresist layer on a semiconductor substrate of a first conductivity type; patterning the photoresist layer to expose a region where a MOS transistor of the first conductivity type is to be formed; thermal processing the patterned photoresist layer to form a mask pattern having a vertical boundary face with a gradual slope; and ion-implanting impurity ions of the first conductivity type into the substrate to form a buried layer in a form of an island within the substrate, wherein the buried layer is continuous under the vertical boundary face of the mask pattern.
Claim 6
Independent Claim
109 words
A method for fabricating a CMOS device with BILLI structure, comprising the steps of: forming a photoresist layer on a semiconductor substrate of a first conductivity type; patterning the photoresist layer to expose a region where a MOS transistor of the first conductivity type is to be formed; thermal processing the patterned photoresist layer to form a mask pattern having a vertical boundary face with a gradual slope; and ion-implanting impurity ions of the first conductivity type into the substrate to form a buried layer in a form of an island within the substrate, wherein the buried layer is continuous under the vertical boundary face of the mask pattern.
Claim 7
Dependent Claim
25 words
The method of fabricating CMOS device as claimed in claim 4, wherein the thermal process is performed at a temperature of 100 to 200° C.