Method of manufacturing a semiconductor device comprising a silicon body in which semiconductor regions are formed by ion implantations

Claim 1

A method of manufacturing a semiconductor device consisting essentially of the steps of (a) insulating a number of areas of a silicon body with field oxide, (b) forming semiconductor regions between said number of areas of field oxide, said semiconductor regions adjoining a surface of said silicon body, said semiconductor regions being formed by (i) forming an implantation mask at said surface, said implantation mask having windows at a first portion of said semiconductor regions, (ii) performing at least one step of ion implanting of n-type dopants into said silicon body through said windows at least at a first energy to form a maximum doping concentration of said n-type dopants at a first depth in said silicon body, (iii) removing said implantation mask, (iv) performing at least one step of ion implanting of p-type dopants into said silicon body over said surface, said p-type dopants being implanted into a second portion of semiconductor regions adjacent to said first portion of said semiconductor regions at least at a second energy to form a maximum doping concentration of said p-type dopants at substantially said first depth in said silicon body, (v) forming a layer of gate oxide on said surface of said silicon body, and thereafter (vi) carrying out another ion implantation of p-type dopant at a third energy lower than said second energy and at a dose to form p-type dopant at a concentration higher than that of said n-type dopant on said surface.

Claim 2

A method of manufacturing a semiconductor device consisting essentially of the steps of (a) insulating a number of areas of a silicon body with field oxide, (b) forming semiconductor regions between said number of areas of field oxide, said semiconductor regions adjoining a surface of said silicon body, said semiconductor regions being formed by (i) forming an implantation mask at said surface, said implantation mask having windows at a first portion of said semiconductor regions, (ii) performing at least one step of ion implanting of n-type dopants into said silicon body through said windows at least at a first energy to form a maximum doping concentration of said n-type dopants at a first depth in said silicon body, (iii) removing said implantation mask, (iv) performing at least one step of ion implanting of p-type dopants into said silicon body over said surface, said p-type dopants being implanted into a second portion of semiconductor regions adjacent to said first portion of said semiconductor regions at least at a second energy to form a maximum doping concentration of said p-type dopants at substantially said first depth in said silicon body, (v) forming a layer of gate oxide on said surface of said silicon body, and thereafter (vi) carrying out another ion implantation of p-type dopant at a third energy lower than said second energy and at a dose to form p-type dopant at a concentration higher than that of said n-type dopant on said surface.

Claim 8

A method of manufacturing a semiconductor device consisting essentially of the steps (a) insulating a number of areas of a silicon body with field oxide, (b) forming semiconductor regions between said number of areas of field oxide, said semiconductor regions adjoining a surface of said silicon body, and said semiconductor regions being formed by (i) forming an implantation mask at said surface, said implantation mask having windows at first portions of said semiconductor regions, (ii) ion implanting n-type dopants into said silicon body through said windows at a first energy and a first concentration to a first depth, (iii) ion implanting n-type dopants into said silicon body through said windows at a second energy lower than said first energy and a second concentration lower than said first concentration to a second depth less than said first depth, (iv) ion implanting n-type dopant into said body through said windows at a third energy less than said second energy and a third concentration less than said second concentration to form a maximum doping concentration at a depth of less than 100 nm in said silicon body, (v) removing said implantation mask, (vi) ion implanting p-type dopant into said silicon body over said surface at a fourth energy less than said first energy and a fourth concentration less than said first concentration to substantially said first depth to form second portions of said semiconductor regions adjacent to said first portions, (vii) ion implanting p-type dopant into said second portions of said semiconductor regions at a fifth energy less than said fourth energy and at a fifth concentration less than said fourth concentration, (viii) forming a layer of gate oxide on said surface of said silicon body, and thereafter (ix) ion implanting p-type dopant at a sixth energy less than said fifth energy and at a sixth concentration greater than said third concentration to form a maximum doping concentration of p-dopant at a depth of less than 100 nm in said silicon body.

Claim 9

A method of manufacturing a semiconductor device consisting essentially of the steps (a) insulating a number of areas of a silicon body with field oxide, (b) forming semiconductor regions between said number of areas of field oxide, said semiconductor regions adjoining a surface of said silicon body, and said semiconductor regions being formed by (i) forming an implantation mask at said surface, said implantation mask having windows at first portions of said semiconductor regions, (ii) ion implanting n-type dopants into said silicon body through said windows at a first energy and a first concentration to a first depth, (iii) ion implanting n-type dopants into said silicon body through said windows at a second energy lower than said first energy and a second concentration lower than said first concentration to a second depth less than said first depth, (iv) ion implanting n-type dopant into said body through said windows at a third energy less than said second energy and a third concentration less than said second concentration to form a maximum doping concentration at a depth of less than 100 nm in said silicon body, (v) removing said implantation mask, (vi) ion implanting p-type dopant into said silicon body over said surface at a fourth energy less than said first energy and a fourth concentration less than said first concentration to substantially said first depth to form second portions of said semiconductor regions adjacent to said first portions, (vii) ion implanting p-type dopant into said second portions of said semiconductor regions at a fifth energy less than said fourth energy and at a fifth concentration less than said fourth concentration, (viii) forming a layer of gate oxide on said surface of said silicon body, and thereafter (ix) ion implanting p-type dopant at a sixth energy less than said fifth energy and at a sixth concentration greater than said third concentration to form a maximum doping concentration of p-dopant at a depth of less than 100 nm in said silicon body.