US5944812A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Register rename stack for a microprocessor
Assignee: Advanced Micro Devices Inc
•
Filing: 1998-12-10
•
Granted: 1999-08-31
•
Expires: 2018-12-10
Abstract
Abstract A register rename unit employs a rename map stack upon which a register rename map corresponding to each dispatched instruction is pushed. Upon occurrence of an exception, the register rename maps corresponding to instructions subsequent to the instruction experiencing the exception are popped from the stack. In this manner, the architected register to implemented register mapping consistent with the instruction experiencing the exception is restored. According to one embodiment, the rename map stack can be recovered from an exception in one clock cycle. In one particular implementation, the rename map stack comprises multiple independent stacks. Each independent stack corresponds to one of the architected registers, and stores implemented register specifiers corresponding to that architected register. When an instruction is dispatched, stacking the corresponding register rename map comprises pushing the implemented register specifier assigned to the destination operand of the instruction onto the independent stack corresponding to the destination architected register. The remaining independent stacks remain unchanged. The register rename map corresponding to the instruction is represented by the top of each of the independent stacks subsequent to pushing the implemented register specifier corresponding to the destination operand.
Inventors
- 👤 Wade A. Walker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 09:31
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30145; G06F9/3016; G06F9/30167; G06F9/30098; G06F9/30101; G06F9/30163; G06F9/38; G06F9/3836; G06F9/3838; G06F9/384; G06F9/3854; G06F9/3856; G06F9/3861; G06F9/3863
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
166 words
A register rename unit for a microprocessor, comprising: a rename map stack configured to store a plurality of register rename maps, wherein each of said plurality of register rename maps identifies a correspondence between each of a set of architected registers for said microprocessor and a corresponding one of a set of implemented registers in said microprocessor; and a stack control unit coupled to said rename map stack, wherein said stack control unit is coupled to receive an implemented register specifier assigned to a destination operand of an instruction, and wherein said stack control unit is configured to form a particular register rename map by updating a top rename map stored at a top of said rename map stack with said implemented register specifier, and wherein said stack control unit is configured to push said particular register rename map onto said rename map stack, and wherein said stack control unit is configured to form and push additional rename maps for each instruction fetched by said microprocessor.
Claim 2
Dependent Claim
166 words
A register rename unit for a microprocessor, comprising: a rename map stack configured to store a plurality of register rename maps, wherein each of said plurality of register rename maps identifies a correspondence between each of a set of architected registers for said microprocessor and a corresponding one of a set of implemented registers in said microprocessor; and a stack control unit coupled to said rename map stack, wherein said stack control unit is coupled to receive an implemented register specifier assigned to a destination operand of an instruction, and wherein said stack control unit is configured to form a particular register rename map by updating a top rename map stored at a top of said rename map stack with said implemented register specifier, and wherein said stack control unit is configured to push said particular register rename map onto said rename map stack, and wherein said stack control unit is configured to form and push additional rename maps for each instruction fetched by said microprocessor.
Claim 3
Dependent Claim
74 words
The register rename unit as recited in claim 1 wherein said rename map stack comprises a plurality of stacks, and wherein each of said plurality of stacks corresponds to a different register from said set of architected registers, and wherein forming said particular rename map comprises pushing said implemented register specifier on one of said plurality of stacks, wherein said one of said plurality of stacks corresponds to said destination operand of said instruction.
Claim 4
Dependent Claim
201 words
A computer system comprising: a microprocessor including a register rename unit comprising: a rename map stack configured to store a plurality of register rename maps, wherein each of said plurality of register rename maps identifies a correspondence between each of a set of architected registers for said microprocessor and a corresponding one of a set of implemented registers in said microprocessor; and a stack control unit coupled to said rename map stack, wherein said stack control unit is coupled to receive an implemented register specifier assigned to a destination operand of an instruction, and wherein said stack control unit is configured to form a particular register rename map by updating a top rename map stored at a top of said rename map stack with said implemented register specifier, and wherein said stack control unit is configured to push said particular register rename map onto said rename map stack, and wherein said stack control unit is configured to form and push additional rename maps for each instruction fetched by said microprocessor; and an input/output (I/O) device coupled to said microprocessor and to another computer system, wherein said I/O device is configured to communicate between said computer system and said another computer system.
Claim 5
Dependent Claim
201 words
A computer system comprising: a microprocessor including a register rename unit comprising: a rename map stack configured to store a plurality of register rename maps, wherein each of said plurality of register rename maps identifies a correspondence between each of a set of architected registers for said microprocessor and a corresponding one of a set of implemented registers in said microprocessor; and a stack control unit coupled to said rename map stack, wherein said stack control unit is coupled to receive an implemented register specifier assigned to a destination operand of an instruction, and wherein said stack control unit is configured to form a particular register rename map by updating a top rename map stored at a top of said rename map stack with said implemented register specifier, and wherein said stack control unit is configured to push said particular register rename map onto said rename map stack, and wherein said stack control unit is configured to form and push additional rename maps for each instruction fetched by said microprocessor; and an input/output (I/O) device coupled to said microprocessor and to another computer system, wherein said I/O device is configured to communicate between said computer system and said another computer system.
Claim 6
Dependent Claim
15 words
The computer system as recited in claim 3 wherein said I/O device comprises a modem.
References Cited (Backward Citations)
US4044338A
Cited
US4453212A
Cited
US4928223A
Cited
US4807115A
Cited
US4858105A
Cited
EP0259095A2
Cited
US4992938A
Cited
EP0381471A2
Cited
US5226126A
Cited
US5136697A
Cited
US5129067A
Cited
US5226130A
Cited
US5058048A
Cited
US5053631A
Cited
EP0459232A2
Cited
GB2263987A
Cited
GB2263985A
Cited
US5519841A
Cited
US5694564A
Cited
GB2281422A
Cited
US5524262A
Cited
US5630149A
Cited
US5778245A
Cited
US5758112A
Cited
US5740414A
Cited
US5675759A
Cited
US5794024A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-08-30 | 2003-03-01 | 2003-08-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-08-30 | 2007-03-01 | 2007-08-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-08-30 | 2011-03-01 | 2011-08-31 | $7700.00 | Window Closed / Lapsed |