Patent US5936262A successfully refreshed from Google Patents.
US5936262A
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Thin film transistors
Assignee: Micron Technology Inc
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Filing: 1996-07-02
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Granted: 1999-08-10
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Expires: 2016-07-02
Abstract
Abstract A thin film transistor includes: a) a thin film transistor layer comprising a source region, a channel region and a drain region; the thin film transistor layer further comprising a drain offset region positioned between the drain region and the channel region; b) the channel region being substantially polycrystalline and having a first average crystalline grain size; and c) the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being larger than the first average crystalline grain size. A method for forming such a construction using polycrystalline materials, preferably polysilicon, and an amorphizing silicon implant with subsequent recrystallization is also disclosed.
Inventors
- 👤 Shubneesh Batra
- 👤 Monte Manning
- 👤 Sanjay Banerjee
- 👤 John Damiano, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:30
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0316; H10D30/0321; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6717; H10D30/6729; H10D30/673; H10D30/6731; H10D30/6732; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; H10D30/675; H10P30/208; H10P30/225
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
69 words
A thin film transistor comprising: a thin film transistor layer comprising a drain offset region positioned between a drain region and a channel region; the channel region being substantially polycrystalline and having a first average crystalline grain size; and the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being different than the first average crystalline grain size.
Claim 2
Dependent Claim
69 words
A thin film transistor comprising: a thin film transistor layer comprising a drain offset region positioned between a drain region and a channel region; the channel region being substantially polycrystalline and having a first average crystalline grain size; and the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being different than the first average crystalline grain size.
Claim 3
Dependent Claim
92 words
A thin film transistor comprising: a thin film transistor layer comprising a drain offset region positioned between a drain region and a channel region; the drain region being substantially polycrystalline and having a first average crystalline grain size; the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being different than the first average crystalline grain size; and further comprising a source region having the first average crystalline grain size, the source region being in physical contact with the channel region.
Claim 4
Dependent Claim
92 words
A thin film transistor comprising: a thin film transistor layer comprising a drain offset region positioned between a drain region and a channel region; the drain region being substantially polycrystalline and having a first average crystalline grain size; the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being different than the first average crystalline grain size; and further comprising a source region having the first average crystalline grain size, the source region being in physical contact with the channel region.
Claim 5
Dependent Claim
69 words
A thin film transistor comprising: a thin film transistor layer comprising a source offset region positioned between a source region and a channel region; the channel region being substantially polycrystalline and having a first average crystalline grain size; and the source offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being different than the first average crystalline grain size.
Claim 6
Dependent Claim
69 words
A thin film transistor comprising: a thin film transistor layer comprising a source offset region positioned between a source region and a channel region; the channel region being substantially polycrystalline and having a first average crystalline grain size; and the source offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being different than the first average crystalline grain size.
Claim 7
Dependent Claim
23 words
The thin film transistor of claim 3 wherein the second average crystalline grain size is larger than the first average crystalline grain size.
Claim 8
Dependent Claim
99 words
A thin film transistor comprising: a thin film transistor layer comprising a source offset region positioned between a source region and a channel region, and comprising a drain offset region positioned between a drain region and the channel region; the channel region being substantially polycrystalline and having a first average crystalline grain size; the source offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being different than the first average crystalline grain size; and the drain offset region being substantially polycrystalline and having the second average crystalline grain size.
Claim 9
Dependent Claim
99 words
A thin film transistor comprising: a thin film transistor layer comprising a source offset region positioned between a source region and a channel region, and comprising a drain offset region positioned between a drain region and the channel region; the channel region being substantially polycrystalline and having a first average crystalline grain size; the source offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being different than the first average crystalline grain size; and the drain offset region being substantially polycrystalline and having the second average crystalline grain size.
Claim 10
Dependent Claim
23 words
The thin film transistor of claim 5 wherein the second average crystalline grain size is larger than the first average crystalline grain size.
Claim 11
Dependent Claim
69 words
A thin film transistor comprising: a thin film transistor layer comprising a drain offset region positioned between a drain region and a channel region; the drain region being substantially polycrystalline and having a first average crystalline grain size; and the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being larger than the first average crystalline grain size.
Claim 12
Dependent Claim
69 words
A thin film transistor comprising: a thin film transistor layer comprising a drain offset region positioned between a drain region and a channel region; the drain region being substantially polycrystalline and having a first average crystalline grain size; and the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being larger than the first average crystalline grain size.
Claim 13
Dependent Claim
79 words
A thin film transistor comprising: a thin film transistor layer comprising a source region a channel region a drain region, and a drain offset region positioned between the drain region and the channel region; the channel region being substantially polycrystalline and having a first average crystalline grain size; and the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being larger than the first average crystalline grain size.
Claim 14
Dependent Claim
79 words
A thin film transistor comprising: a thin film transistor layer comprising a source region a channel region a drain region, and a drain offset region positioned between the drain region and the channel region; the channel region being substantially polycrystalline and having a first average crystalline grain size; and the drain offset region being substantially polycrystalline and having a second average crystalline grain size, the second average crystalline grain size being larger than the first average crystalline grain size.
Claim 15
Dependent Claim
26 words
The thin film transistor of claim 8 wherein the second average crystalline grain size is at least 50% greater than the first average crystalline grain size.
Claim 16
Dependent Claim
19 words
The thin film transistor of claim 8 wherein the channel region and drain offset region each predominantly comprise polysilicon.
Claim 17
Dependent Claim
38 words
The thin film transistor of claim 8 wherein the channel region and drain offset region each predominantly comprise polysilicon, and the second average crystalline grain size is at least 50% greater than the first average crystalline grain size.
Claim 18
Dependent Claim
20 words
The thin film transistor of claim 8 wherein the channel region and drain offset region each predominantly comprise polycrystalline CdSe.
Claim 19
Dependent Claim
21 words
The thin film transistor of claim 8 wherein the drain region is substantially polycrystalline having the second average crystalline grain size.
Claim 20
Dependent Claim
21 words
The thin film transistor of claim 8 wherein the source region is substantially polycrystalline having the second average crystalline grain size.
Claim 21
Dependent Claim
27 words
The thin film transistor of claim 8 wherein each of the drain region and the source region is substantially polycrystalline having the second average crystalline grain size.
Claim 22
Dependent Claim
21 words
The thin film transistor of claim 8 wherein the drain region is substantially polycrystalline having the first average crystalline grain size.
Claim 23
Dependent Claim
21 words
The thin film transistor of claim 8 wherein the source region is substantially polycrystalline having the first average crystalline grain size.
Claim 24
Dependent Claim
27 words
The thin film transistor of claim 8 wherein each of the drain region and the source region is substantially polycrystalline having the first average crystalline grain size.
Claim 25
Dependent Claim
36 words
The thin film transistor of claim 8 further comprising a source offset positioned between the source region and the channel region, the source offset region being substantially polycrystalline and having the second average crystalline grain size.
Claim 26
Dependent Claim
51 words
The thin film transistor of claim 8 further comprising a source offset positioned between the source region and the channel region, the source offset region being substantially polycrystalline and having the second average crystalline grain size; and the drain region being substantially polycrystalline and having the second average crystalline grain size.
Claim 27
Dependent Claim
51 words
The thin film transistor of claim 8 further comprising a source offset positioned between the source region and the channel region, the source offset region being substantially polycrystalline and having the second average crystalline grain size; and the source region being substantially polycrystalline and having the second average crystalline grain size.
Claim 28
Dependent Claim
65 words
The thin film transistor of claim 8 further comprising a source offset positioned between the source region and the channel region, the source offset region being substantially polycrystalline and having the second average crystalline grain size; the source region being substantially polycrystalline and having the second average crystalline grain size; and the drain region being substantially polycrystalline and having the second average crystalline grain size.
Claim 29
Dependent Claim
78 words
The thin film transistor of claim 8 further comprising a source offset positioned between the source region and the channel region, the source offset region being substantially polycrystalline and having the second average crystalline grain size; the source region being substantially polycrystalline and having the second average crystalline grain size; the drain region being substantially polycrystalline and having the second average crystalline grain size; and each of the source, drain, drain offset, and channel regions predominantly comprising polysilicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-08-09 | 2003-02-08 | 2003-08-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-08-09 | 2007-02-08 | 2007-08-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-08-09 | 2011-02-08 | 2011-08-10 | $7700.00 | Window Closed / Lapsed |