US4498224A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a MOSFET using accelerated ions to form an amorphous region
Assignee: Toshiba Corp
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Filing: 1982-10-24
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Granted: 1985-02-12
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Expires: 2002-10-24
Abstract
Abstract A method for manufacturing MOSFET type semiconductor devices comprises forming a gate insulation layer and a gate electrode on a single crystal semiconductor substrate; introducing impurities in the substrate using the gate electrode as a mask; introducing accelerated ions deeper into the substrate than the impurities and overlapping at least a portion of the region in which the impurities are introduced in order to convert that portion to an amorphous state; diffusing the impurities into the amorphous region using a heating atmosphere, in order to form source and drain regions and, at the same time, converting the amorphous region to a single crystal; and forming source and drain electrodes in contact with the source and drain regions.
Inventors
- 👤 Kenji Maeguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 03:42
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10P; H10P30/00; H10P30/20; H10P30/21; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10P30/202; H10P30/204; H10P30/208; H10P30/28; H10P32/00; H10P32/10; H10P32/14; H10P32/1404; H10P32/1406; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S148/00; Y10S148/082
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
135 words
A method for manufacturing semiconductors of the MOSFET type comprising the steps of: forming a gate insulation layer and a gate electrode on a selected portion of a semiconductor body of single crystal material having a first conductivity type; introducing impurities of a second conductivity type into a preselected region of the semiconductor body using the gate electrode as a mask; introducing accelerated ions to overlap at least a portion of the region in which the impurities are introduced, wherein a fraction of the accelerated ions is introduced deeper than the impurities, said accelerated ion introducing step converting the crystal material of said semiconductive body portion into an amorphous state; forming a diffused region by diffusion of the second conductivity type impurities from said preselected region; and forming an electrode to contact the diffused region.
Claim 2
Independent Claim
135 words
A method for manufacturing semiconductors of the MOSFET type comprising the steps of: forming a gate insulation layer and a gate electrode on a selected portion of a semiconductor body of single crystal material having a first conductivity type; introducing impurities of a second conductivity type into a preselected region of the semiconductor body using the gate electrode as a mask; introducing accelerated ions to overlap at least a portion of the region in which the impurities are introduced, wherein a fraction of the accelerated ions is introduced deeper than the impurities, said accelerated ion introducing step converting the crystal material of said semiconductive body portion into an amorphous state; forming a diffused region by diffusion of the second conductivity type impurities from said preselected region; and forming an electrode to contact the diffused region.
Claim 3
Dependent Claim
14 words
The manufacturing method according to claim 1, wherein the accelerated ions are Si ions.
Claim 4
Dependent Claim
29 words
The manufacturing method according to claim 1, wherein the diffused region has a shallow portion and a deep portion, and the electrode is formed to contact the deep portion.
Claim 5
Dependent Claim
37 words
The manufacturing method according to claim 1, wherein the accelerated ions are introduced through a hole in an insulation layer formed to cover said preselected region, said insulation layer having been formed after said impurity introducing step.
Claim 6
Dependent Claim
15 words
The manufacturing method according to claim 4, wherein the electrode is formed in said hole.
Claim 7
Dependent Claim
38 words
The manufacturing method according to claim 4 further comprising the step of introducing additional impurities through the hole, said additional impurity introducing step being accomplished after said accelerated ion introducing step and before said diffused region forming step.
Claim 8
Dependent Claim
18 words
A manufacturing method according to claim 1, wherein the semiconductive body is previously formed on a sapphire substrate.
Claim 9
Dependent Claim
27 words
The manufacturing method according to claim 1, wherein said diffused region forming step is carried out by heating the body to not more than about 700° C.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-02-12 | 1988-08-13 | 1989-02-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-02-12 | 1992-08-13 | 1993-02-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-02-12 | 1996-08-13 | 1997-02-12 | $7700.00 | Window Closed / Lapsed |