Dual damascene structure and its manufacturing method

Claim 1

A method of forming a dual damascene structure, comprising the steps of: providing a semiconductor substrate; forming a dielectric layer above the semiconductor substrate; forming a patterned mask layer on the dielectric layer; performing a first implanting step to form a first etching stop layer in the dielectric layer, the first etching stop layer having a via opening; forming a spacer layer on the mask layer; forming a patterned photoresist layer on the spacer layer; removing parts of the photoresist and spacer layer so as to form a spacer on the sidewall of the mask layer and to leave the spacer layer under the photoresist layer; performing a second implanting step to form a second etching stop layer on the dielectric layer, the second etching stop layer having a trench opening; removing the spacer layer, spacer, and mask layer; removing parts of the dielectric layer to expose parts of the semiconductor substrate, first etching stop layer and second etching stop layer; forming a conductive layer on the semiconductor substrate, first etching stop layer and second etching stop layer; and removing the conductive layer above the second etching stop layer so as to form the dual damascene structure.

Claim 2

A method of forming a dual damascene structure, comprising the steps of: providing a semiconductor substrate; forming a dielectric layer above the semiconductor substrate; forming a patterned mask layer on the dielectric layer; performing a first implanting step to form a first etching stop layer in the dielectric layer, the first etching stop layer having a via opening; forming a spacer layer on the mask layer; forming a patterned photoresist layer on the spacer layer; removing parts of the photoresist and spacer layer so as to form a spacer on the sidewall of the mask layer and to leave the spacer layer under the photoresist layer; performing a second implanting step to form a second etching stop layer on the dielectric layer, the second etching stop layer having a trench opening; removing the spacer layer, spacer, and mask layer; removing parts of the dielectric layer to expose parts of the semiconductor substrate, first etching stop layer and second etching stop layer; forming a conductive layer on the semiconductor substrate, first etching stop layer and second etching stop layer; and removing the conductive layer above the second etching stop layer so as to form the dual damascene structure.

Claim 21

A method of forming a dual damascene structure, comprising the steps of: providing a semiconductor substrate; forming a dielectric layer above the semiconductor substrate; forming a mask layer having a first opening on the dielectric layer; forming a spacer on the sidewall of the first opening; performing a first implanting step to form an implanting stop layer in the dielectric layer with a first depth away from the top surface of the dielectric layer; removing the spacer, and defining a second opening in the mask layer; performing a second implanting step to form an etching stop layer in the dielectric layer with a second depth away from the top surface of the dielectric layer; performing a third implanting step to reduce the anti-implantation ability of the implanting stop layer; removing parts of the dielectric to form a trench and a via, the via exposing the semiconductor substrate; forming a conductive layer in the trench and via, and on the dielectric layer; and removing the conductive layer and the mask layer on the dielectric layer.

Claim 22

A method of forming a dual damascene structure, comprising the steps of: providing a semiconductor substrate; forming a dielectric layer above the semiconductor substrate; forming a mask layer having a first opening on the dielectric layer; forming a spacer on the sidewall of the first opening; performing a first implanting step to form an implanting stop layer in the dielectric layer with a first depth away from the top surface of the dielectric layer; removing the spacer, and defining a second opening in the mask layer; performing a second implanting step to form an etching stop layer in the dielectric layer with a second depth away from the top surface of the dielectric layer; performing a third implanting step to reduce the anti-implantation ability of the implanting stop layer; removing parts of the dielectric to form a trench and a via, the via exposing the semiconductor substrate; forming a conductive layer in the trench and via, and on the dielectric layer; and removing the conductive layer and the mask layer on the dielectric layer.