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US5923985A
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MOS field effect transistor and its manufacturing method
Assignee: Seiko Instruments Inc
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Filing: 1997-01-14
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Granted: 1999-07-13
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Expires: 2017-01-14
Abstract
Abstract A method of manufacturing a MOS field effect transistor comprises forming on a semiconductor substrate a first epitaxial growth layer having an impurity doping concentration lower than that of the semiconductor substrate, forming on the first epitaxial growth layer a second epitaxial growth layer having an impurity concentration higher than that of the first epitaxial growth layer and having a thickness equal to or less than a diffusion depth of a source and a drain region, and forming on the second eptiaxial growth layer a third epitaxial growth layer having an impurity concentration lower than that of the second epitaxial growth layer and having a thickness equal to or less than that of a depletion layer at a channel region.
Inventors
- 👤 Kenji Aoki
- 👤 Ryoji Takada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:48
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/025; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/027; H10D30/0278; H10D30/60; H10D30/637; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/292; H10D62/314
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
123 words
A method of manufacturing a MOS field effect transistor, comprising the steps of: forming on a semiconductor substrate a first epitaxial growth layer having an impurity doping concentration lower than that of the semiconductor substrate; forming on the first epitaxial growth layer a second epitaxial growth layer having an impurity concentration higher than that of the first epitaxial growth layer and having a thickness equal to or less than a diffusion depth of a source and a drain region; and forming on the second epitaxial growth layer a third epitaxial growth layer having an impurity concentration lower than that of the second epitaxial growth layer and having a thickness equal to or less than that of a depletion layer at a channel region.
Claim 2
Independent Claim
123 words
A method of manufacturing a MOS field effect transistor, comprising the steps of: forming on a semiconductor substrate a first epitaxial growth layer having an impurity doping concentration lower than that of the semiconductor substrate; forming on the first epitaxial growth layer a second epitaxial growth layer having an impurity concentration higher than that of the first epitaxial growth layer and having a thickness equal to or less than a diffusion depth of a source and a drain region; and forming on the second epitaxial growth layer a third epitaxial growth layer having an impurity concentration lower than that of the second epitaxial growth layer and having a thickness equal to or less than that of a depletion layer at a channel region.
Claim 3
Dependent Claim
28 words
A method of manufacturing a MOS field effect transistor according to claim 1; wherein the first, second and third epitaxial growth layers are formed by molecular layer epitaxy.
Claim 4
Dependent Claim
27 words
A method of manufacturing a MOS field effect transistor according to claim 1; wherein the first and second epitaxial growth layers are formed by molecular layer epitaxy.
Claim 5
Dependent Claim
37 words
A method of manufacturing a MOS field effect transistor according to claim 1; wherein one of the first epitaxial growth layer and the second epitaxial growth layer is formed at a temperature of 850° C. or less.
Claim 6
Dependent Claim
37 words
A method of manufacturing a MOS field effect transistor according to claim 2; wherein one of the first epitaxial growth layer and the second epitaxial growth layer is formed at a temperature of 850° C. or less.
Claim 7
Independent Claim
70 words
A method of manufacturing a MOS field effect transistor, comprising the steps of: providing a semiconductor substrate; depositing three epitaxial growth layers successively on a surface of the semiconductor substrate, the epitaxial growth layers having different thicknesses, and at least two of the epitaxial growth layers having different impurity doping concentrations; and forming a source region and a drain region over the surface of the semiconductor substrate by ion implantation.
Claim 8
Independent Claim
70 words
A method of manufacturing a MOS field effect transistor, comprising the steps of: providing a semiconductor substrate; depositing three epitaxial growth layers successively on a surface of the semiconductor substrate, the epitaxial growth layers having different thicknesses, and at least two of the epitaxial growth layers having different impurity doping concentrations; and forming a source region and a drain region over the surface of the semiconductor substrate by ion implantation.
Claim 9
Dependent Claim
100 words
A method of manufacturing a MOS field effect transistor according to claim 5; wherein the step of depositing the three epitaxial growth layers comprises depositing on the surface of the semiconductor substrate a first epitaxial growth layer having an impurity doping concentration lower than that of the semiconductor substrate, depositing on the first epitaxial growth layer a second epitaxial growth layer having an impurity concentration higher than that of the first epitaxial growth layer, and depositing on the second epitaxial growth layer a third epitaxial growth layer having an impurity concentration lower than that of the second epitaxial growth layer.
Claim 10
Dependent Claim
51 words
A method of manufacturing a MOS field effect transistor according to claim 7; wherein the second epitaxial growth layer has a thickness greater than a thickness of the first epitaxial growth layer, and the third epitaxial growth layer has a thickness smaller than the thickness of the first epitaxial growth layer.
Claim 11
Dependent Claim
100 words
A method of manufacturing a MOS field effect transistor according to claim 6; wherein the step of depositing the three epitaxial growth layers comprises depositing on the surface of the semiconductor substrate a first epitaxial growth layer having an impurity doping concentration lower than that of the semiconductor substrate, depositing on the first epitaxial growth layer a second epitaxial growth layer having a thickness greater than a thickness of the first epitaxial growth layer, and depositing on the second epitaxial growth layer a third epitaxial growth layer having a thickness smaller than a thickness of the first epitaxial growth layer.
Claim 12
Dependent Claim
32 words
A method of manufacturing a MOS field effect transistor according to claim 9; wherein the second epitaxial growth layer has an impurity concentration higher than that of the first epitaxial growth layer.
Claim 13
Dependent Claim
37 words
A method of manufacturing a MOS field effect transistor according to claim 10; wherein the thickness of the second epitaxial growth layer is equal to or less than a diffusion depth of the source and drain regions.
Claim 14
Dependent Claim
37 words
A method of manufacturing a MOS field effect transistor according to claim 9; wherein the thickness of the second epitaxial growth layer is equal to or less than a diffusion depth of the source and drain regions.
Claim 15
Dependent Claim
32 words
A method of manufacturing a MOS field effect transistor according to claim 9; wherein the third epitaxial growth layer has an impurity concentration lower than that of the second epitaxial growth layer.
Claim 16
Dependent Claim
37 words
A method of manufacturing a MOS field effect transistor according to claim 13; wherein the thickness of the third epitaxial growth layer is equal to or less than that of a depletion layer at a channel region.
Claim 17
Dependent Claim
37 words
A method of manufacturing a MOS field effect transistor according to claim 9; wherein the thickness of the third epitaxial growth layer is equal to or less than that of a depletion layer at a channel region.
Claim 18
Dependent Claim
37 words
A method of manufacturing a MOS field effect transistor according to claim 9; wherein one of the first epitaxial growth layer and the second epitaxial growth layer is formed at a temperature of 850° C. or less.
Claim 19
Dependent Claim
28 words
A method of manufacturing a MOS field effect transistor according to claim 9; wherein the first, second and third epitaxial growth layers are formed by molecular layer epitaxy.
Claim 20
Dependent Claim
37 words
A method of manufacturing a MOS field effect transistor according to claim 17; wherein one of the first epitaxial growth layer and the second epitaxial growth layer is formed at a temperature of 850° C. or less.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-07-12 | 2003-01-11 | 2003-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-07-12 | 2007-01-11 | 2007-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-07-12 | 2011-01-11 | 2011-07-13 | $7700.00 | Window Closed / Lapsed |