US5914530A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Hitachi Ltd
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Filing: 1998-04-01
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Granted: 1999-06-22
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Expires: 2018-04-01
Abstract
Abstract As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
Inventors
- 👤 Gen Murakami
- 👤 Kunihiro Tsubosaki
- 👤 Masahiro Ichitani
- 👤 Kunihiko Nishi
- 👤 Ichiro Anjoh
- 👤 Asao Nishimura
- 👤 Makoto Kitano
- 👤 Akihiro Yaguchi
- 👤 Sueo Kawai
- 👤 Masatsugu Ogata
- 👤 Syuuji Eguchi
- 👤 Hiroyoshi Kokaku
- 👤 Masanori Segawa
- 👤 Hiroshi Hozoji
- 👤 Takashi Yokoyama
- 👤 Noriyuki Kinjo
- 👤 Aizo Kaneda
- 👤 Junichi Saeki
- 👤 Shozo Nakamura
- 👤 Akio Hasebe
- 👤 Hiroshi Kikuchi
- 👤 Isamu Yoshida
- 👤 Takashi Yamazaki
- 👤 Kazuyoshi Oshima
- 👤 Tetsuro Matsumoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 09:33
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10D; H10D62/00; H10D62/10; H10D62/117; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W70/421; H10W70/424; H10W70/427; H10W70/429; H10W70/435; H10W70/456; H10W70/458; H10W70/461; H10W90/00; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/144; H05K1/18; H05K1/181; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3421; H10W70/60; H10W72/00; H10W72/01; H10W72/015; H10W72/01515; H10W72/071; H10W72/073; H10W72/075; H10W72/07531; H10W72/07532; H10W72/07533; H10W72/20; H10W72/29; H10W72/30; H10W72/321; H10W72/325; H10W72/351; H10W72/352; H10W72/353; H10W72/354; H10W72/381; H10W72/50; H10W72/521; H10W72/522; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/5525; H10W72/553; H10W72/555; H10W72/59; H10W72/851; H10W72/853; H10W72/865; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W72/951; H10W90/20; H10W90/291; H10W90/701; H10W90/721; H10W90/726; H10W90/731; H10W90/736; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
125 words
A semiconductor device comprising: a semiconductor chip having a main surface, an integrated circuit and external terminals formed on said main surface, and a polyimide film covering said main surface, said polyimide film having openings exposing said external terminals; a plurality of leads each having an inner lead, a portion of said inner lead being disposed over said main surface; an insulating layer having a base insulating film and adhesive layers sandwiching said base insulating film, said insulating layer being arranged between the portions of the inner leads and said polyimide film; and bonding wires electrically connecting said portions of said inner leads with corresponding external terminals respectively, wherein said portions of said inner leads are adhered to said semiconductor chip via said insulating layer.
Claim 2
Dependent Claim
125 words
A semiconductor device comprising: a semiconductor chip having a main surface, an integrated circuit and external terminals formed on said main surface, and a polyimide film covering said main surface, said polyimide film having openings exposing said external terminals; a plurality of leads each having an inner lead, a portion of said inner lead being disposed over said main surface; an insulating layer having a base insulating film and adhesive layers sandwiching said base insulating film, said insulating layer being arranged between the portions of the inner leads and said polyimide film; and bonding wires electrically connecting said portions of said inner leads with corresponding external terminals respectively, wherein said portions of said inner leads are adhered to said semiconductor chip via said insulating layer.
Claim 3
Dependent Claim
22 words
A semiconductor device according to claim 1, wherein an area of said insulating layer is smaller than that of said polyimide film.
Claim 4
Dependent Claim
23 words
A semiconductor device according to claim 1, wherein a thickness of said base insulating film is larger than that of said polyimide film.
Claim 5
Dependent Claim
19 words
A semiconductor device according to claim 3, wherein said polyimide film has a thickness of 2.0 to 10.0 microns.
Claim 6
Dependent Claim
17 words
A semiconductor device according to claim 1, wherein said polyimide film acts as a shield against alpha-rays.
Claim 7
Dependent Claim
19 words
A semiconductor device according to claim 1, wherein said integrated circuit of said semiconductor chip includes a memory circuit.
Claim 8
Dependent Claim
25 words
A semiconductor device according to claim 1, wherein said plurality of leads further each has an outer lead which is continuous with the inner lead.
Claim 9
Dependent Claim
33 words
A semiconductor device according to claim 7, further comprising a member sealing said semiconductor chip, said inner leads, said insulating layer and said bonding wires, the outer leads protruding outwardly from said member.
Claim 10
Dependent Claim
14 words
A semiconductor device according to claim 8, wherein said member is a resin member.
Claim 11
Dependent Claim
16 words
A semiconductor device according to claim 1, wherein said base insulating film includes a polyimide film.
Claim 12
Dependent Claim
24 words
A semiconductor device according to claim 1, wherein an area occupied by said insulating layer is smaller than that occupied by said polyimide film.
Claim 13
Dependent Claim
100 words
A semiconductor device according to claim 11, wherein said main surface of said semiconductor chip has a rectangular shape and a pair of longer edges extending in a first direction and a pair of shorter edges extending in a second direction which is different from said first direction, wherein said inner leads extend across one of said pair of longer edges and are arranged at an interval in said first direction, and wherein said insulating layer extends in said first direction and is continuously formed in an area between said inner leads over said main surface of said semiconductor chip.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-06-21 | 2002-12-21 | 2003-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-06-21 | 2006-12-21 | 2007-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-06-21 | 2010-12-21 | 2011-06-22 | $7700.00 | Window Closed / Lapsed |