US5327009A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Miniaturized integrated circuit package
Assignee: Micron Memory Japan Ltd
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Filing: 1993-05-24
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Granted: 1994-07-05
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Expires: 2013-05-24
Abstract
Abstract A high density integrated circuit package is provided whose miniaturization is performed by positioning inner end portions of lead fingers extending externally of the package inside a peripheral portion of a rectangular semiconductor chip. Bonding terminals on the rectangular semiconductor chip are arranged along one of long sides thereof, a plurality of lead fingers are arranged in a direction perpendicular to the long side and the inner end portions of the lead fingers are arranged in the vicinity of the arrangement of the chip terminals, so that distance between the chip terminals and the inner end portions of the lead fingers is shortened and length of thin metal wires connecting the chip terminals and the inner end portions of the lead fingers is reduced.
Inventors
- 👤 Masahiko Igeta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 17:56
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W72/00; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/59; H10W72/851; H10W72/853; H10W72/865; H10W72/90; H10W72/931; H10W72/932; H10W74/00; H10W90/00; H10W90/701; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
254 words
A semiconductor device comprising a semiconductor chip having first and second sides parallel to each other, a plurality of bonding terminals arranged in line along said first side, an insulating film covering said semiconductor chip without covering said bonding terminals, a plurality of first leads provided correspondingly to first ones of said bonding terminals, a plurality of second leads provided correspondingly to remaining second ones of said bonding terminals, each of said first leads having an inner end portion provided on said insulating film such that a corresponding one of said first ones of said bonding terminals exists between said inner end portion and said first side of said semiconductor chip and a remaining portion extended from said inner end portion to an outside of said semiconductor chip with passing over said first side of said semiconductor chip, each of said second leads having an inner end portion provided on said insulating film adjacently to a corresponding one of said second ones of said bonding terminals and a remaining portion extended from said inner end portion to an outside of said semiconductor chip with passing over said second side of said semiconductor chip, a plurality of first bonding wires each connecting each of said first ones of said bonding terminals to said inner end portion of a corresponding one of said first leads, and a plurality of second bonding wires each connecting each of said second ones of said bonding terminals to said inner end portion of a corresponding one of said second leads.
Claim 2
Dependent Claim
254 words
A semiconductor device comprising a semiconductor chip having first and second sides parallel to each other, a plurality of bonding terminals arranged in line along said first side, an insulating film covering said semiconductor chip without covering said bonding terminals, a plurality of first leads provided correspondingly to first ones of said bonding terminals, a plurality of second leads provided correspondingly to remaining second ones of said bonding terminals, each of said first leads having an inner end portion provided on said insulating film such that a corresponding one of said first ones of said bonding terminals exists between said inner end portion and said first side of said semiconductor chip and a remaining portion extended from said inner end portion to an outside of said semiconductor chip with passing over said first side of said semiconductor chip, each of said second leads having an inner end portion provided on said insulating film adjacently to a corresponding one of said second ones of said bonding terminals and a remaining portion extended from said inner end portion to an outside of said semiconductor chip with passing over said second side of said semiconductor chip, a plurality of first bonding wires each connecting each of said first ones of said bonding terminals to said inner end portion of a corresponding one of said first leads, and a plurality of second bonding wires each connecting each of said second ones of said bonding terminals to said inner end portion of a corresponding one of said second leads.
Claim 3
Dependent Claim
28 words
A semiconductor device as recited in claim 1, wherein said chip terminal and said corresponding lead finger are arranged on the short side of said rectangular semiconductor chip.
Claim 4
Dependent Claim
36 words
A semiconductor device as recited in claim 1, wherein the number of said chip terminals and said corresponding lead fingers is increased according to the required integration density of the internal circuits of said semiconductor chip.
Claim 5
Dependent Claim
39 words
A semiconductor device as recited in claim 1, wherein the distance between the adjacent chip terminals and the corresponding adjacent lead fingers is optimally maintained according to the required integration density of the internal circuits of said semiconductor chip.
Claim 6
Dependent Claim
36 words
A semiconductor device as recited in claim 2, wherein the number of said chip terminals and said corresponding lead fingers is increased according to the required integration density of the internal circuits of said semiconductor chip.
Claim 7
Dependent Claim
39 words
A semiconductor device as recited in claim 2, wherein the distance between the adjacent chip terminals and the corresponding adjacent lead fingers is optimally maintained according to the required integration density of the internal circuits of said semiconductor chip.
References Cited (Backward Citations)
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US4862245A
Cited
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Cited
JPH01123427A
Cited
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Cited
JPH03256352A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-07-04 | 1998-01-03 | 1998-07-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-07-04 | 2002-01-03 | 2002-07-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-07-04 | 2006-01-03 | 2006-07-05 | $7700.00 | Window Closed / Lapsed |