US5913112A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing an insulated gate field effect semiconductor device having an offset region and/or lightly doped region
Assignee: Semiconductor Energy Laboratory Co Ltd
•
Filing: 1994-03-11
•
Granted: 1999-06-15
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Expires: 2014-03-11
Abstract
Abstract An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
Inventors
- 👤 Shunpei Yamazaki
- 👤 Yasuhiko Takemura
- 👤 Hongyong Zhang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 11:02
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/021; H10D86/0221; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6719; H10D30/6729; H10D30/673; H10D30/6731; H10D30/6737; H10D30/6739; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; H10D30/6746; H10D62/00; H10D62/40; H10D86/40; H10D86/60; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/1333; G02F1/1345; G02F1/13454; G02F1/136; G02F1/1362; G02F1/13624; G02F1/136245
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
160 words
A method of manufacturing a plurality of insulated gate field effect semiconductor device comprising the steps of: forming at least first and second semiconductor islands on an insulating surface; forming a gate insulating layer on said first and second semiconductor islands; forming at least first and second gate electrodes over said first and second semiconductor islands, respectively, with said gate insulating layer interposed therebetween; introducing a first and a second impurity into said first and second semiconductor islands, respectively, with said first and second gate electrodes as masks; oxidizing the external surface of said first and second gate electrodes which is formed over said first and second semiconductor islands in order to form an oxide layer thereon, wherein said oxidizing step is carried out in such a manner that the oxide layer of the first gate electrode formed over said first semiconductor island is thicker than the oxide layer of the second gate electrode formed over said second semiconductor island.
Claim 2
Independent Claim
160 words
A method of manufacturing a plurality of insulated gate field effect semiconductor device comprising the steps of: forming at least first and second semiconductor islands on an insulating surface; forming a gate insulating layer on said first and second semiconductor islands; forming at least first and second gate electrodes over said first and second semiconductor islands, respectively, with said gate insulating layer interposed therebetween; introducing a first and a second impurity into said first and second semiconductor islands, respectively, with said first and second gate electrodes as masks; oxidizing the external surface of said first and second gate electrodes which is formed over said first and second semiconductor islands in order to form an oxide layer thereon, wherein said oxidizing step is carried out in such a manner that the oxide layer of the first gate electrode formed over said first semiconductor island is thicker than the oxide layer of the second gate electrode formed over said second semiconductor island.
Claim 3
Dependent Claim
52 words
The method of claim 1 wherein first and second gate electrodes are subjected to an anodic oxidation in said oxidizing step, said anodic oxidation being extended to a longer period on the first gate electrode formed over said first semiconductor island on the second gate electrode formed over said second semiconductor island.
Claim 4
Dependent Claim
15 words
The method of claim 1 wherein said oxidizing step is carried out by anodic oxidation.
Claim 5
Dependent Claim
31 words
The method of claim 1 wherein said first and second gate electrodes comprise a metal or alloy thereof, said metal selected from the group consisting of titanium, aluminum, tantalum and chromium.
Claim 6
Dependent Claim
15 words
The method of claim 1 wherein said oxidizing step is conducted by a plasma oxidation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-06-14 | 2002-12-14 | 2003-06-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-06-14 | 2006-12-14 | 2007-06-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-06-14 | 2010-12-14 | 2011-06-15 | $7700.00 | Window Closed / Lapsed |