US5142344A
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Insulated gate field effect transistor and its manufacturing method
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1991-05-24
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Granted: 1992-08-25
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Expires: 2011-05-24
Abstract
Abstract An insulated gate field effect transistor comprises a non-single-crystalline semiconductor layer formed on a substrate, a gate electrode is formed on a portion of the surface of said semiconductor layer, and a gate insulated film is disposed between said gate electrode and said semiconductor layer. A non-single-crystalline channel region is defined within said semiconductor layer just below said gate electrode. A source region and a drain region are transformed from and defined within said semiconductor layer immediately adjacent to said channel region in an opposed relation, said source and drain regions being crystallized to a higher degree than that of said channel region by selectively irradiating portions of said semiconductor layer using said gate electrode as a mask.
Inventors
- 👤 Shunpei Yamazaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:42
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6729; H10D30/673; H10D30/6731; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6746; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2921; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3238; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; H10P14/38; H10P14/3802; H10P34/00; H10P34/40; H10P34/42; Y; Y10; Y10S; Y10S257/00; Y10S257/914
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
92 words
An insulated gate field effect transistor comprising: a semiconductor layer provided on an insulating surface of a substrate; source and drain regions provided in said semiconductor layer; a channel region defined between said source and drain regions in said semiconductor layer; crystallized regions which are provided in said semiconductor layer and extend from said source and drain regions to said channel region respectively, wherein the crystallized regions define therebetween a low-crystallization region having a lower degree of crystallization than that of said crystallized regions, said low-crystallization region located in said channel region.
Claim 2
Dependent Claim
92 words
An insulated gate field effect transistor comprising: a semiconductor layer provided on an insulating surface of a substrate; source and drain regions provided in said semiconductor layer; a channel region defined between said source and drain regions in said semiconductor layer; crystallized regions which are provided in said semiconductor layer and extend from said source and drain regions to said channel region respectively, wherein the crystallized regions define therebetween a low-crystallization region having a lower degree of crystallization than that of said crystallized regions, said low-crystallization region located in said channel region.
Claim 3
Dependent Claim
19 words
The insulated gate field effect transistor of claim 1 wherein said crystallized regions extend down to said insulating surface.
Claim 4
Dependent Claim
24 words
The insulated gate field effect transistor of claim 1 wherein said crystallized regions extend vertically and do not extend down to said insulating surface.
Claim 5
Dependent Claim
99 words
An insulated gate field effect transistor comprising: a semiconductor layer provided on an insulating surface of a substrate; source and drain regions provided in said semiconductor layer; a channel region defined between said source and drain regions in said semiconductor layer; crystallized regions which are provided in said semiconductor layer and extend from said source and drain regions toward said channel region respectively, wherein the crystallized regions define therebetween a low-crystallization region having a lower degree of crystallization than that of said crystallized regions, said low-crystallization region located at least in part in said source and drain regions, respectively.
Claim 6
Dependent Claim
99 words
An insulated gate field effect transistor comprising: a semiconductor layer provided on an insulating surface of a substrate; source and drain regions provided in said semiconductor layer; a channel region defined between said source and drain regions in said semiconductor layer; crystallized regions which are provided in said semiconductor layer and extend from said source and drain regions toward said channel region respectively, wherein the crystallized regions define therebetween a low-crystallization region having a lower degree of crystallization than that of said crystallized regions, said low-crystallization region located at least in part in said source and drain regions, respectively.
Claim 7
Dependent Claim
19 words
The insulated gate field effect transistor of claim 4 wherein said crystallized regions extend down to said insulating surface.
Claim 8
Dependent Claim
24 words
The insulated gate field effect transistor of claim 4 wherein said crystallized regions extend vertically and do not extend down to said insulating surface.
References Cited (Backward Citations)
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