US4459739A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Thin film transistors
Assignee: Nortel Networks Ltd
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Filing: 1982-12-13
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Granted: 1984-07-17
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Expires: 2002-12-13
Abstract
Abstract A thin film transistor has a semiconductor layer, an insulating layer and source, drain and gate electrodes. The improvement comprises creating an enhanced conductivity layer in the semiconductor by ion implantation or diffusion on phased deposition. The benefits of the enhanced conductivity layer are that transistor action is obtained without the conventional annealing step and DC stability is much improved.
Inventors
- 👤 Frank R. Shepherd
- 👤 William D. Westwood
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 03:18
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6733; H10D30/6734; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; H10D30/675; H10P; H10P30/00; H10P30/20; Y; Y10; Y10S; Y10S148/00; Y10S148/003; Y10S148/053; Y10S148/122; Y10S148/145
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
92 words
A method of fabricating a thin film transistor comprising: depositing upon a substrate: (i) a semiconductor layer having a zone of enhanced conductivity spaced from respective boundaries of the layer; (ii) a dielectric layer having surface contact with a first surface of the semiconductor layer; (iii) first and second conducting regions contacting said semiconductor layer at spaced locations; and (iv) a third conducting region at one side of the dielectric layer remote from the semiconductor layer coextensive with a part at least of the space between said first and second conducting regions.
Claim 2
Independent Claim
92 words
A method of fabricating a thin film transistor comprising: depositing upon a substrate: (i) a semiconductor layer having a zone of enhanced conductivity spaced from respective boundaries of the layer; (ii) a dielectric layer having surface contact with a first surface of the semiconductor layer; (iii) first and second conducting regions contacting said semiconductor layer at spaced locations; and (iv) a third conducting region at one side of the dielectric layer remote from the semiconductor layer coextensive with a part at least of the space between said first and second conducting regions.
Claim 3
Dependent Claim
17 words
A method as claimed in claim 1, wherein the enhanced conductivity zone is produced by ion implantation.
Claim 4
Dependent Claim
31 words
A method as claimed in claim 2, further comprising directing the implantation ions through a mask thereby limiting ion impingement to exposed semiconductor extending between the first and second conducting regions.
Claim 5
Dependent Claim
58 words
A method as claimed in claim 2, further comprising thermally annealing to promote diffusion of dopant from the first conducting region into a region intermediate said first conducting region and the enhanced conductivity zone and to promote diffusion of dopant from the second conducting region into a region intermediate the second conducting region and the enhanced conductivity zone.
Claim 6
Dependent Claim
35 words
A method as claimed in claim 1, in which the enhanced conductivity zone is produced by depositing a conducting film over the semiconductor and heating to promote diffusion of the conducting film into the semiconductor.
Claim 7
Dependent Claim
29 words
A method as claimed in claim 1, in which the semiconductor layer is produced in a multi-stage deposition process, one such stage comprising deposition of said enhanced conductivity zone.
Claim 8
Dependent Claim
63 words
A method as claimed in claim 1, in which the enhanced conductivity zone is produced by a first step of enhancing the conductivity of the semiconductor layer from one boundary to a first depth, and a second step of restoring the resistivity of the semiconductor from said one boundary to a second, reduced, depth to isolate said enhanced conductivity zone between the boundaries.
Claim 9
Dependent Claim
30 words
A method as claimed in claim 1, in which the order of the enumerated deposition steps is as follows to produce a TFT of inverted structure: iv; ii; i; iii.
Claim 10
Dependent Claim
68 words
A method as claimed in claim 8 further comprising depositing a second dielectric layer over said first and second conducting regions and an exposed part of the semiconductor layer and then depositing a fourth conducting region over the second insulation layer to be coextensive with a part at least of the space between said first and second conducting regions, whereby to produce a TFT of double gated structure.
Claim 11
Dependent Claim
30 words
A method as claimed in claim 1, in which the order of the enumerated deposition steps is as follows to produce a TFT of upright structure: iii; i; ii; iv.
Claim 12
Dependent Claim
30 words
A method as claimed in claim 1, in which the order of the enumerated deposition steps is as follows to produce a TFT of coplanar-upright structure: i; iii; ii; iv.
Claim 13
Dependent Claim
31 words
A method as claimed in claim 1, in which the order of the enumerated deposition steps is as follows to produce a TFT of coplanar-linear-structure: iii and iv simultaneously; ii; i.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-07-17 | 1988-01-16 | 1988-07-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-07-17 | 1992-01-16 | 1992-07-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-07-17 | 1996-01-16 | 1996-07-17 | $7700.00 | Window Closed / Lapsed |