Field oxide transistor based feedback circuit for electrical overstress protection

Claim 2

Protection circuitry for protecting a circuit that has a maximum high operating voltage from damage due to electrical overstress resulting from a transient voltage applied to a node of the circuit to be protected, wherein the transient voltage is equal to or greater than a selected peak voltage, the peak voltage being greater than the maximum high operating voltage of the circuit to be protected, the protection circuitry comprising: a sensor that includes a field oxide transistor having a threshold voltage equal to the selected peak voltage, the gate of the field oxide transistor being connected to said node of the circuit to be protected such that the field oxide transistor turns on when the transient voltage is applied to said node, whereby the sensor provides an active sensor output signal; a logic circuit connected to receive the active sensor output signal as an input and that responds to the active sensor output signal by generating an active logic circuit output signal; and a transient signal shunting element connected to said node and that responds to the active logic circuit output signal by providing a conductive path to shunt the transient voltage to a negative supply.

Claim 3

Protection circuitry as in claim 1, and wherein the transient signal shunting element includes an n-channel MOS shunting transistor having its gate connected to receive the logic circuit output signal, its source connected to the negative supply and its drain connected to said node, such that the active logic circuit output signal causes the transient voltage to be shunted through the n-channel MOS transistor to the negative supply.

Claim 4

Protection circuitry as in claim 2, and wherein shunting of the transient voltage through the n-channel MOS transistor lowers the voltage at said node to below said selected peak voltage, thereby causing said field oxide transistor to turn off and resulting in a change in state of the logic circuit output signal such that said n-channel MOS transistor turns off, whereby said n-channel MOS transistor is caused to oscillate between an "on" state and an "off" state until said transient voltage is dissipated from said node.

Claim 5

Protection circuitry as in claim 1, and wherein said circuit to be protected is connected to receive a positive supply voltage, and wherein said maximum high operating voltage is greater than said positive supply voltage.

Claim 6

Protection circuitry as in claim 1, and wherein the logic circuit comprises cable driver output stage circuitry, and wherein said node of the circuit to be protected is adapted for connection of a cable thereto.

Claim 7

Protection circuitry as in claim 1, and wherein the transient signal shunting element is an element of the circuit to be protected.

Claim 10

A method as in claim 7, and wherein the transient signal shunting element includes an n-channel MOS transistor having its gate connected to receive the logic circuit output signal, its source connected to the negative supply and its drain connected to said node, such that the active logic state of the logic circuit output signal causes the transient voltage to be shunted through the n-channel MOS transistor to the negative supply.

Claim 11

A method as in claim 8, and wherein shunting of the transient voltage through the n-channel MOS transistor lowers the voltage at said node to below said selected peak voltage, thereby causing said field oxide transistor to turn off and resulting in a change in state of the logic circuit output signal from the active logic state to the inactive logic state such that said n-channel MOS transistor turns off, whereby said n-channel MOS transistor is caused to oscillate between an "on" state and an "off" state until said transient voltage is dissipated from said node.

Claim 12

A method as in claim 7, and wherein said circuit to be protected is connected to receive a positive supply voltage, and wherein said maximum high operating voltage is greater than said positive supply voltage.

Claim 13

A method as in claim 7, and wherein said logic circuit comprises a cable driver output stage, and wherein said node of the circuit to be protected is adapted for connection to a cable.

Claim 14

Protection circuitry for protecting a circuit that has a maximum high operating voltage from damage due to electrical overstress from a transient voltage applied to a node of the circuit to be protected, wherein the transient voltage is equal to or greater than a selected peak voltage, the peak voltage being greater than the maximum high operating voltage of the circuit to be protected, the protection circuitry comprising: a field oxide transistor having its gate connected to said node of the circuit to be protected, its drain coupled to a positive supply voltage and its source connected to a negative supply, the field oxide transistor having a threshold voltage equal to the peak voltage such that the field oxide transistor turns on when the transient voltage is applied to said node and provides a sensor signal having a high logic state at its drain; a logic circuit connected to the drain of the field oxide transistor, the logic circuit responding to a sensor signal having low logic state by providing a first logic circuit output signal having a low logic state, the first logic circuit output signal having a high logic state when the sensor signal has a high logic state; and an n-channel MOS shunting transistor having its gate connected to receive the first logic circuit output signal, its source connected to the negative supply and its drain connected to said node of the circuit to be protected; whereby the n-channel MOS shunting transistor responds to the high logic state of the first logic circuit output signal by turning on to provide a conductive path to shunt the transient voltage to the negative supply.

Claim 15

Protection circuitry for protecting a circuit that has a maximum high operating voltage from damage due to electrical overstress from a transient voltage applied to a node of the circuit to be protected, wherein the transient voltage is equal to or greater than a selected peak voltage, the peak voltage being greater than the maximum high operating voltage of the circuit to be protected, the protection circuitry comprising: a field oxide transistor having its gate connected to said node of the circuit to be protected, its drain coupled to a positive supply voltage and its source connected to a negative supply, the field oxide transistor having a threshold voltage equal to the peak voltage such that the field oxide transistor turns on when the transient voltage is applied to said node and provides a sensor signal having a high logic state at its drain; a logic circuit connected to the drain of the field oxide transistor, the logic circuit responding to a sensor signal having low logic state by providing a first logic circuit output signal having a low logic state, the first logic circuit output signal having a high logic state when the sensor signal has a high logic state; and an n-channel MOS shunting transistor having its gate connected to receive the first logic circuit output signal, its source connected to the negative supply and its drain connected to said node of the circuit to be protected; whereby the n-channel MOS shunting transistor responds to the high logic state of the first logic circuit output signal by turning on to provide a conductive path to shunt the transient voltage to the negative supply.

Claim 16

Protection circuitry as in claim 12, and wherein the drain of the field oxide transistor is coupled to the positive supply via a PMOS resistor.

Claim 17

Protection circuitry as in claim 13, and wherein the logic circuit includes a first logic element that responds to the high logic state of the sensor signal by providing the first logic circuit output signal having the high logic state and a second logic element that responds to the high logic state of the sensor signal by providing a second logic circuit output signal having a low logic state, the protection circuitry further comprising an n-channel MOS driver transistor having its gate connected to receive the second logic circuit output signal, its source connected to the drain of the n-channel MOS shunting transistor and its drain connected to the positive supply.

Claim 18

Protection circuitry as in claim 14, and wherein the first logic element comprises a NAND gate that receives the sensor signal as inputs, and wherein the second logic element comprises a NOR gate that receives the data signal as a first input and that receives an inverted sensor signal as a second input.