← Back to Patent Explorer
US5902122A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing an ILD layer by plasma treatment before applying SOG

Assignee: SK Hynix Inc
•
Filing: 1996-12-20
•
Granted: 1999-05-11
•
Expires: 2016-12-20
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method of manufacturing a semiconductor device is provided. A first interlayer insulating layer is formed on a silicon substrate, and a lower metal layer is formed on the first interlayer insulating layer. A first insulating layer is formed on the first interlayer insulating layer including the lower metal layer, moisture contained in the first insulating layer is removed by N 2 or N 2 O plasma. Thereafter, a SOG layer and a second insulating layer are sequentially formed on the first insulating layer.

Inventors

  • 👤 Dong Sun Sheen
  • 👤 Jeong Rae Lee

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 03:33
CPC Classifications
H; H10; H10P; H10P95/00; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/071; H10W20/092; H10W20/093; H10W20/096; H10W20/074; H10W20/077

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 147 words
A method of manufacturing a semiconductor device comprising the steps of: forming a first interlayer insulating layer on a silicon substrate; forming a lower metal layer on said first interlayer insulating layer; forming a first insulating layer using a plasma chemical vapor deposition method on said first interlayer insulating layer including said lower metal layer; removing moisture contained in said first insulating layer by plasma which is generated by applying any one of a N 2 gas and N 2 O gas with a flow rate of 0.5 to 5 SLM and simultaneously applying RF power having a high frequency of 13.56 MHZ and a low frequency of 400 to 500 MHZ at 1 to 3 Torr at a temperature between 300 and 450 degrees Celsius; sequentially forming a SOG layer and a second insulating layer; and forming an upper metal layer on said second insulating layer.
Claim 2
Independent Claim 147 words
A method of manufacturing a semiconductor device comprising the steps of: forming a first interlayer insulating layer on a silicon substrate; forming a lower metal layer on said first interlayer insulating layer; forming a first insulating layer using a plasma chemical vapor deposition method on said first interlayer insulating layer including said lower metal layer; removing moisture contained in said first insulating layer by plasma which is generated by applying any one of a N 2 gas and N 2 O gas with a flow rate of 0.5 to 5 SLM and simultaneously applying RF power having a high frequency of 13.56 MHZ and a low frequency of 400 to 500 MHZ at 1 to 3 Torr at a temperature between 300 and 450 degrees Celsius; sequentially forming a SOG layer and a second insulating layer; and forming an upper metal layer on said second insulating layer.

References Cited (Backward Citations)

US5270267A Cited
US5484749A Cited
US5314724A Cited
US5334554A Cited
US5413963A Cited
US5554567A Cited
US5656123A Cited
US5556806A Cited
US5665635A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-05-10 2002-11-09 2003-05-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-05-10 2006-11-09 2007-05-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-05-10 2010-11-09 2011-05-11 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag