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US5900641A Expired / Lapsed US ⏱️ 0.0 years remaining

Field effect semiconductor device having a reduced leakage current

Assignee: Fujitsu Ltd
•
Filing: 1997-12-29
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Granted: 1999-05-04
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Expires: 2017-12-29
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Abstract

Abstract A field-effect transistor including a channel layer, a source electrode, a drain electrode, a high-resistance layer provided on the channel layer between the source electrode and the drain electrode and a gate electrode provided in an opening formed in the high-resistance layer, wherein the high-resistance layer is defined by a first side-wall facing the source electrode and a second side-wall facing the drain electrode, such that the first side-wall is separated from the source electrode.

Inventors

  • 👤 Naoki Hara
  • 👤 Shuichi Tanaka
  • 👤 Masahiko Takikawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 02:45
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/87

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 113 words
A field-effect transistor, comprising: a channel layer transporting carriers therethrough; a source electrode injecting carriers into said channel layer; a drain electrode collecting carriers from said channel layer; a high-resistance layer provided on said channel layer between said source electrode and said drain electrode, said high-resistance layer including an opening in said high-resistance layer; and a gate electrode provided in said opening, said high-resistance layer being defined by a first side-wall facing said source electrode and a second side-wall facing said drain electrode, wherein at least said first side-wall is formed with a separation from said source electrode, and wherein said high-resistance layer is formed on the channel layer in an epitaxial relationship.
Claim 2
Dependent Claim 113 words
A field-effect transistor, comprising: a channel layer transporting carriers therethrough; a source electrode injecting carriers into said channel layer; a drain electrode collecting carriers from said channel layer; a high-resistance layer provided on said channel layer between said source electrode and said drain electrode, said high-resistance layer including an opening in said high-resistance layer; and a gate electrode provided in said opening, said high-resistance layer being defined by a first side-wall facing said source electrode and a second side-wall facing said drain electrode, wherein at least said first side-wall is formed with a separation from said source electrode, and wherein said high-resistance layer is formed on the channel layer in an epitaxial relationship.
Claim 3
Dependent Claim 18 words
A field-effect transistor as claimed in claim 1, wherein said second side-wall is separated from said drain electrode.
Claim 4
Dependent Claim 22 words
A field-effect transistor as claimed in claim 1, wherein said high-resistance layer is formed on the channel layer with an epitaxial relationship.
Claim 5
Dependent Claim 95 words
A field-effect transistor as claimed in claim 1, wherein said channel layer includes first and second diffusion regions respectively corresponding to said source electrode and drain electrode such that said source electrode achieves an ohmic contact with said first diffusion region and such that said drain electrode achieves an ohmic contact with said second diffusion region, said first diffusion region extending in said channel layer over a region between said source electrode and first side-wall, said second diffusion region extending in said channel layer over a region between said drain electrode and said second side-wall.
Claim 6
Dependent Claim 53 words
A field-effect transistor as claimed in claim 1, wherein said channel layer carries thereon a barrier layer having a bandgap larger than a bandgap of said channel layer, and wherein said high-resistance layer is formed on said barrier layer epitaxially, said barrier layer being formed in an epitaxial relationship with said channel layer.
Claim 7
Dependent Claim 38 words
A field-effect transistor as claimed in claim 5, wherein said channel layer includes a dopant element having a polarity identical to a polarity of carriers passing therethrough, and wherein said barrier layer is substantially free from dopant elements.
Claim 8
Dependent Claim 44 words
A field-effect transistor as claimed in claim 5, wherein said channel layer includes a dopant element having a polarity identical to a polarity of carriers passing therethrough, and wherein said high-resistance layer is substantially free from dopant elements except for a surface part thereof.
Claim 9
Dependent Claim 57 words
A field-effect transistor as claimed in claim 5, wherein said channel layer is substantially free from dopant elements, and wherein said barrier layer contains a dopant element having a polarity identical to a polarity of carriers passing through said channel layer, said channel layer thereby including a two-dimensional carrier gas along an interface to said barrier layer.
Claim 10
Dependent Claim 23 words
A field-effect transistor as claimed in claim 1, wherein said channel layer contains a dopant element having a polarity of carriers passing therethrough.

References Cited (Backward Citations)

JPS61171170A Cited
US5161235A Cited
US5789767A Cited
US5583355A Cited
US5672890A Cited
US5739557A Cited
US5739558A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-05-03 2002-11-02 2003-05-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-05-03 2006-11-02 2007-05-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-05-03 2010-11-02 2011-05-04 $7700.00 Window Closed / Lapsed

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