Field effect transistor with lightly doped drain regions

Claim 1

A field effect transistor having a Lightly Doped Drain structure, comprising: a semiconductor substrate; a gate electrode formed on a top surface of said semiconductor substrate; an active layer of a first conductivity type, which is formed in said substrate while being in Schottky contact with said gate electrode; a buried layer of a second conductivity type, which is located under said active layer while being in direct contact with said active layer; source and drain regions extending from said top surface of said substrate toward a rear surface of said substrate in an opposite side of said top surface and separated from each other by said active layer, said active layer forming a channel for current flow between said source region and said drain region; and ohmic electrodes respectively formed on said source and drain regions; each of said source and drain regions having: a first region having a high impurity concentration and including a first upper region of the first conductivity type, said first upper region extending from said top surface of said substrate toward said rear surface of said substrate, and a first lower region of the second conductivity type, said first lower region being located under said first upper region while being in direct contact with and covering an entire bottom surface of said first upper region, and a second region having a portion between said active layer and said first region and having an impurity concentration lower than that of said first region, said portion including a second upper region of the first conductivity type, said second upper region extending from said top surface of said substrate toward said rear surface of said substrate, and a second lower region of the second conductivity type, said second lower region being located under said second upper region while being in direct contact with and covering an entire bottom surface of said second upper region.