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US5892269A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device including an intrusion film layer

Assignee: Semiconductor Components Industries LLC
•
Filing: 1997-02-26
•
Granted: 1999-04-06
•
Expires: 2017-02-26
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Abstract

Abstract A semiconductor device including an insulation film superior in both planarization and water resistance is obtained. In this semiconductor device, a first insulation film including impurities is formed on a conductive layer. A film is formed between the first insulation film and the conductive layer for substantially preventing impurities from entering the conductive layer. Water resistance of the first insulation film is improved since impurities are included in the first insulation film. By using an insulation film superior in planarization as the first insulation film, a first insulation film superior in both planarization and water resistance can be obtained. The film provided between the first insulation film and the conductive layer prevents the impurities of the first insulation film from entering the conductive layer. Therefore, reduction in the reliability of the conductive layer can be prevented.

Inventors

  • 👤 Yasunori Inoue
  • 👤 Hideki Mizuhara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:09
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10W; H10W42/00; H10P95/00; H10W20/00; H10W20/01; H10W20/071; H10W20/093; H10W20/095; H10W20/097; H10W20/40; H10W20/41; H10W20/42; H10W20/425; H10W20/074

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 78 words
A semiconductor device comprising: a first insulation film formed on a conductive layer, and including impurities, and an intrusion prevention film formed between said first insulation film and said conductive layer for substantially preventing intrusion of said impurities into said conductive layer, said intrusion prevention film having a planar pattern substantially conforming to that of the conductive layer as a result of simultaneously etching said intrusion prevention film and said conductive layer using the same photo resist mask.
Claim 2
Dependent Claim 78 words
A semiconductor device comprising: a first insulation film formed on a conductive layer, and including impurities, and an intrusion prevention film formed between said first insulation film and said conductive layer for substantially preventing intrusion of said impurities into said conductive layer, said intrusion prevention film having a planar pattern substantially conforming to that of the conductive layer as a result of simultaneously etching said intrusion prevention film and said conductive layer using the same photo resist mask.
Claim 3
Dependent Claim 34 words
The semiconductor device according to claim 1, wherein said intrusion prevention film includes at least one material selected from a group consisting of silicon oxide, silicon nitride, Ti, TiN, W, WN X and TiW.
Claim 4
Dependent Claim 24 words
The semiconductor device according to claim 1, further comprising a second insulation film formed between said first insulation film and said intrusion prevention film.
Claim 5
Dependent Claim 22 words
The semiconductor device according to claim 3, wherein said second insulation film includes a film less hygroscopic than said first insulation film.
Claim 6
Dependent Claim 21 words
The semiconductor device according to claim 1, wherein said first insulation film includes silicon oxide containing at least 1% of carbon.
Claim 7
Dependent Claim 17 words
The semiconductor device according to claim 1, wherein said first insulation film includes an inorganic SOG film.
Claim 8
Dependent Claim 26 words
The semiconductor device according to claim 1, wherein said impurities include at least one element selected from a group consisting of argon, boron, nitrogen, and phosphorus.
Claim 9
Dependent Claim 18 words
The semiconductor device according to claim 1, wherein an upper surface of said first insulation film is planarized.

References Cited (Backward Citations)

US4668973A Cited
US4676867A Cited
JPH02235358A Cited
US5387812A Cited
US5373192A Cited
US5341026A Cited
JPH05226334A Cited
US5519254A Cited
US5310700A Cited
US5523616A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-04-05 2002-10-05 2003-04-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-04-05 2006-10-05 2007-04-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-04-05 2010-10-05 2011-04-06 $7700.00 Window Closed / Lapsed

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