Patent US5880502A successfully refreshed from Google Patents.
US5880502A
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Low and high voltage CMOS devices and process for fabricating same
Assignee: Micron Technology Inc
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Filing: 1996-09-06
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Granted: 1999-03-09
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Expires: 2016-09-06
Abstract
Abstract CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a single step. Further, gates for both NMOS and PMOS devices are doped with n-type dopant and NMOS gates are self-aligned.
Inventors
- 👤 John K. Lee
- 👤 Behnam Moradi
- 👤 Michael J. Westphal
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 06:24
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/601; H10D30/603; H10D62/00; H10D62/10; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/378; H10D64/00; H10D64/60; H10D64/66; H10D64/661; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0172; H10D84/0179; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/856
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
131 words
A semiconducting structure comprising: a substrate; a gate oxide extending from a first end to a second end, the gate oxide being disposed on the substrate a first thick field oxide extending from the first end of the gate oxide away from the gate oxide; a second thick field oxide extending from the second end of the gate oxide away from the gate oxide; a first p+ doped region disposed under the first thick field oxide; a second p+ doped region disposed under the second thick field oxide; a first gate disposed over the gate oxide, a first portion of the first gate extending over a portion of the first thick field oxide and a second portion of the first gate extending over a portion of the second thick field oxide.
Claim 2
Dependent Claim
131 words
A semiconducting structure comprising: a substrate; a gate oxide extending from a first end to a second end, the gate oxide being disposed on the substrate a first thick field oxide extending from the first end of the gate oxide away from the gate oxide; a second thick field oxide extending from the second end of the gate oxide away from the gate oxide; a first p+ doped region disposed under the first thick field oxide; a second p+ doped region disposed under the second thick field oxide; a first gate disposed over the gate oxide, a first portion of the first gate extending over a portion of the first thick field oxide and a second portion of the first gate extending over a portion of the second thick field oxide.
Claim 3
Dependent Claim
42 words
A semiconducting structure according to claim 1, a first portion of the first p+ doped region being disposed under the first thick field oxide, a second portion of the first p+ doped region being disposed under a portion of the gate oxide.
Claim 4
Dependent Claim
42 words
A semiconducting structure according to claim 2, a first portion of the second p+ doped region being disposed under the second thick field oxide, a second portion of the second p+ doped region being disposed under a portion of the gate oxide.
Claim 5
Dependent Claim
64 words
A semiconducting structure according to claim 3, a concentration of p+ dopants in the first portion of the first p+ doped region being greater than in the second portion of the first p+ doped region, and a concentration of p+ dopants in the first portion of the second p+ doped region being greater than in the second portion of the second p+ doped region.
Claim 6
Dependent Claim
23 words
A semiconducting structure according to claim 1, further comprising an n-well, the first and second p+ doped regions being disposed in the n-well.
Claim 7
Dependent Claim
12 words
A semiconducting structure according to claim 5, further including a stop region.
Claim 8
Dependent Claim
36 words
A semiconducting structure according to claim 6, wherein the first and second p+ doped regions and the stop region are formed by simultaneously implanting dopants through the first and second thick field oxides into the substrate.
Claim 9
Dependent Claim
55 words
A semiconducting structure according to claim 1, further including an nmos transistor comprising: an active region; a second gate disposed over at least a portion of the active region; an n+ doped source region disposed in the substrate under the active region; an n+ doped drain region disposed in the substrate under the active region.
Claim 10
Dependent Claim
36 words
A semiconducting structure according to claim 8, wherein the n+ doped source region, the n+ doped drain region, the first gate, and the second gate are formed by simultaneously implanting n+ type dopants into the device.
Claim 11
Dependent Claim
118 words
A semiconducting structure according to claim 1, further including an nmos transistor comprising: a third thick field oxide; a second gate oxide disposed on the substrate on one side of the third thick field oxide; a third gate oxide disposed on the substrate on a side of the third thick field oxide opposite the one side; an n+ doped source region disposed in the substrate under the second gate oxide; an n+ doped drain region disposed in the substrate under the third gate oxide; an n+ doped gate, a portion of the n+ doped gate being disposed over the second gate oxide and a portion of the n+ doped gate being disposed over the third thick field oxide.
Claim 12
Dependent Claim
27 words
A semiconducting structure according to claim 10, further including an n- tank disposed in the substrate, the n+ doped drain region being disposed in the n- tank.
Claim 13
Dependent Claim
21 words
A semiconducting structure according to claim 11, further including a stop region disposed between the first gate and the nmos transistor.
Claim 14
Dependent Claim
28 words
A semiconducting structure according to claim 12, wherein the first and second p+ doped regions and the stop region are fabricated by simultaneously implanting dopants into the structure.
Claim 15
Dependent Claim
52 words
A semiconducting structure according to claim 13, further including a pmos transistor including: a fourth thick field oxide; a p+ doped source region disposed under the fourth thick field oxide; a p+ doped drain region disposed under the fourth thick field oxide; a second gate disposed over the fourth thick field oxide.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-08 | 2002-09-07 | 2003-03-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-08 | 2006-09-07 | 2007-03-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-08 | 2010-09-07 | 2011-03-09 | $7700.00 | Window Closed / Lapsed |