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US5880015A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of producing stepped wall interconnects and gates

Assignee: STMicroelectronics lnc USA
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Filing: 1994-10-14
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Granted: 1999-03-09
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Expires: 2014-10-14
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Abstract

Abstract A method is provided for making conductive structures whereby an insulating layer is formed over a substrate. A conductive layer is then formed over the insulating layer. A first photoresist layer is formed over the conductive layer, patterned and developed. The conductive layer is etched after which the first photoresist layer is removed. A second photoresist layer is formed over the integrated circuit, patterned and developed. The remaining regions of the conductive layer forming an interconnect or a gate are partially etched to form two-tiered stepped sidewalls.

Inventors

  • 👤 William Y. Hata

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 03:55
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10P; H10P50/00; H10P50/71; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/062

Claims Analysis

Total Claims: 30
Claim 1
Independent Claim 106 words
A method of producing a conductive structure of a semiconductor integrated circuit having stepped walls, comprising the steps of: forming an insulating layer over a substrate; forming a conductive layer over the insulating layer; forming a first photoresist layer over the conductive layer; patterning the first photoresist layer; etching the conductive layer to completely remove portions not covered by the patterned first photoresist layer and to form a remaining conductive layer; forming a second photoresist layer over the remaining conductive layer and the insulating layer; patterning the second photoresist layer; partially etching the remaining conductive layer to form a step; and, removing the second photoresist layer.
Claim 2
Independent Claim 106 words
A method of producing a conductive structure of a semiconductor integrated circuit having stepped walls, comprising the steps of: forming an insulating layer over a substrate; forming a conductive layer over the insulating layer; forming a first photoresist layer over the conductive layer; patterning the first photoresist layer; etching the conductive layer to completely remove portions not covered by the patterned first photoresist layer and to form a remaining conductive layer; forming a second photoresist layer over the remaining conductive layer and the insulating layer; patterning the second photoresist layer; partially etching the remaining conductive layer to form a step; and, removing the second photoresist layer.
Claim 3
Dependent Claim 20 words
The method of claim 1, wherein the step of etching the conductive layer to completely remove portions forms an interconnect.
Claim 4
Dependent Claim 20 words
The method of claim 1, wherein the step of etching the conductive layer to completely remove portions forms a gate.
Claim 5
Dependent Claim 40 words
The method of claim 3, wherein the substrate is heavily doped after removing the first photoresist layer step to form a first source/drain region and lightly doped after removing the second photoresist layer step to form a second source/drain region.
Claim 6
Dependent Claim 11 words
The method of claim 4, wherein the dopants are N-type dopants.
Claim 7
Dependent Claim 11 words
The method of claim 4, wherein the dopants are P-type dopants.
Claim 8
Dependent Claim 35 words
The method of claim 3, further comprising the step of implanting a dopant after the second etching step to form a heavily doped first source/drain region and a lightly doped source/drain region under the step.
Claim 9
Dependent Claim 12 words
The method of claim 7, wherein the dopant is a N-type dopants.
Claim 10
Dependent Claim 12 words
The method of claim 7, wherein the dopant is a P-type dopants.
Claim 11
Dependent Claim 23 words
The method of claim 1, wherein the thickness of the first photoresist layer is thinner than the thickness of the second photoresist layer.
Claim 12
Dependent Claim 23 words
The method of claim 2, wherein the thickness of the first photoresist layer is thinner than the thickness of the second photoresist layer.
Claim 13
Dependent Claim 23 words
The method of claim 1, wherein the pattern of the second photoresist layer is smaller than the pattern of the first photoresist layer.
Claim 14
Independent Claim 66 words
A method of producing a conductive structure of a semiconductor integrated circuit having stepped sidewalls, comprising the steps of: forming an insulating layer over a substrate; forming a conductive layer over the insulating layer; completely removing portions of the conductive layer to form a remaining conductive layer; and partially etching regions on the remaining conductive layer so that the remaining conductive layer has two-tiered stepped sidewalls.
Claim 15
Independent Claim 66 words
A method of producing a conductive structure of a semiconductor integrated circuit having stepped sidewalls, comprising the steps of: forming an insulating layer over a substrate; forming a conductive layer over the insulating layer; completely removing portions of the conductive layer to form a remaining conductive layer; and partially etching regions on the remaining conductive layer so that the remaining conductive layer has two-tiered stepped sidewalls.
Claim 16
Dependent Claim 19 words
The method of claim 13, wherein the step of completely removing portions of the conductive layer forms an interconnect.
Claim 17
Dependent Claim 19 words
The method of claim 13, wherein the step of completely removing portions of the conductive layer forms a gate.
Claim 18
Dependent Claim 23 words
The method of claim 15, further comprising the step of forming a source/drain region in the substrate under the step of the gate.
Claim 19
Independent Claim 130 words
A method of producing a conductive structure of a semiconductor integrated circuit having stepped sidewalls, comprising the steps of: forming an insulating layer over a substrate; forming a conductive layer over the insulating layer; forming and patterning a first photoresist layer over the conductive layer; etching the conductive layer to completely remove portions not covered by the patterned first photoresist layer and to form a remaining conductive layer; removing the first photoresist layer; forming and patterning a second photoresist layer over the remaining conductive layer; etching partway through the remaining conductive layer; removing the second photoresist layer; forming sidewall oxide spacers in regions of the conductive layer where the conductive layer was etched partway through; and etching portions of the remaining conductive layer not covered by the sidewall oxide spacers.
Claim 20
Independent Claim 130 words
A method of producing a conductive structure of a semiconductor integrated circuit having stepped sidewalls, comprising the steps of: forming an insulating layer over a substrate; forming a conductive layer over the insulating layer; forming and patterning a first photoresist layer over the conductive layer; etching the conductive layer to completely remove portions not covered by the patterned first photoresist layer and to form a remaining conductive layer; removing the first photoresist layer; forming and patterning a second photoresist layer over the remaining conductive layer; etching partway through the remaining conductive layer; removing the second photoresist layer; forming sidewall oxide spacers in regions of the conductive layer where the conductive layer was etched partway through; and etching portions of the remaining conductive layer not covered by the sidewall oxide spacers.
Claim 21
Dependent Claim 20 words
The method of claim 17, wherein the step of etching part way through the remaining conductive layer forms an interconnect.
Claim 22
Dependent Claim 20 words
The method of claim 17, wherein the step of etching part way through the remaining conductive layer forms a gate.
Claim 23
Dependent Claim 33 words
The method of claim 19, further comprising the steps of: lightly doping the substrate after removing the photoresist layer; heavily doping the substrate after etching the exposed region of the remaining conductive layer.
Claim 24
Dependent Claim 18 words
The method of claim 20, wherein the sidewall oxide spacers are removed after the substrate is heavily doped.
Claim 25
Independent Claim 154 words
A method of producing a conductive structure having stepped walls in a semiconductor integrated circuit, comprising: forming an insulating layer over a substrate; forming a conductive layer over the insulating layer; forming a first photoresist layer over the conductive layer; patterning the first photoresist layer to leave a first photoresist region over the conductive layer; etching the conductive layer to completely remove portions of the conductive layer not covered by the first photoresist region and to form a remaining conductive layer; removing the first photoresist region; forming a second photoresist layer over the remaining conductive layer and the insulating layer; patterning the second photoresist layer to form a second photoresist region located only over the remaining conductive layer, the second photoresist region being smaller than the first photoresist region; partially etching portions of the remaining conductive layer not covered by the second photoresist region to form a step; and removing the second photoresist region.
Claim 26
Independent Claim 154 words
A method of producing a conductive structure having stepped walls in a semiconductor integrated circuit, comprising: forming an insulating layer over a substrate; forming a conductive layer over the insulating layer; forming a first photoresist layer over the conductive layer; patterning the first photoresist layer to leave a first photoresist region over the conductive layer; etching the conductive layer to completely remove portions of the conductive layer not covered by the first photoresist region and to form a remaining conductive layer; removing the first photoresist region; forming a second photoresist layer over the remaining conductive layer and the insulating layer; patterning the second photoresist layer to form a second photoresist region located only over the remaining conductive layer, the second photoresist region being smaller than the first photoresist region; partially etching portions of the remaining conductive layer not covered by the second photoresist region to form a step; and removing the second photoresist region.
Claim 27
Dependent Claim 23 words
The method of claim 22, wherein the thickness of the first photoresist layer is thinner that the thickness of the second photoresist layer.
Claim 28
Dependent Claim 20 words
The method of claim 22, wherein the step of partially etching portions of the remaining conductive layer forms an interconnect.
Claim 29
Dependent Claim 20 words
The method of claim 22, wherein the step of partially etching portions of the remaining conductive layer forms a gate.
Claim 30
Dependent Claim 40 words
The method of claim 25, wherein the substrate is heavily doped after removing the remaining first photoresist region to form a first source/drain region and lightly doped after removing the remaining second photoresist region to form a second source/drain region.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-03-08 2002-09-07 2003-03-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-03-08 2006-09-07 2007-03-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-03-08 2010-09-07 2011-03-09 $7700.00 Window Closed / Lapsed

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